# US 10,770,026 B2 · Display device, and source driver and packet recognition method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,026 B2 - Document ID: US10770026B2 - Status: Granted - Kind: B2 - Application number: 16/469,460 - Filed: 2017-12-12 - Published: 2020-04-09 - Granted: 2020-09-08 - Earliest claimed: 2016-12-14 - Assignees: Silicon Works Co., Ltd. - Applicants: Silicon Works Co., Ltd. - Inventors: Ju Young Shin; Sang Min Lee; Su Hun Yang; Jeung Hie Choi - Web page: https://patentgrep.com/patent/US10770026B2 ## CPC - G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} - G09G 5/008: {Clock recovery} - G09G 3/2096: {Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167)} - G09G 3/3275: Details of drivers for data electrodes - G09G 3/3688: {suitable for active matrices only} - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G 2370/08: Details of image data interface between the display device controller and the data line driver circuit - G09G 2370/10: Use of a protocol of communication by packets in interfaces along the display data pipeline - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Disclosed are a display device, and a source driver and a packet recognition method thereof. In the display device, when check information of a control data packet of transmitted transmission data is normal, a control data packet of to be restored is updated with a control data packet of a current cycle, and when the check information is abnormal, the control data packet to be restored is maintained, so that it is possible to normally drive a source signal even through there is an error or a change in the control data packet. ## Claims ### Claim 1 A display device comprising: a timing controller configured to constitute a control data packet including check information and transmits transmission data cyclically including the control data packet; and a source driver configured to receive the transmission data, update, when the check information of a first control data packet of a current cycle is normal, a second control data packet to be restored, with the first control data packet, and maintain, when the check information of the first control data packet of the current cycle is abnormal, the second control data packet at a state of a previous cycle. ### Claim 2 (depends on 1) The display device of claim 1, wherein, when a value of the check information of the first control data packet of the current cycle is different from a value of check information before transmission, the source driver determines that the value of the check information is not satisfied with a preset condition and thus the check information is abnormal. ### Claim 3 (depends on 1) The display device of claim 1, wherein the timing controller configures the check information by using a plurality of bits included in control data of the control data packet. ### Claim 4 (depends on 3) The display device of claim 3, wherein the check information is composed of a plurality of consecutive bits in bits of the control data. ### Claim 5 (depends on 3) The display device of claim 3, wherein the check information is composed of a plurality of bits including at least one non-consecutive bit, among the bits of the control data. ### Claim 6 (depends on 3) The display device of claim 3, wherein the plurality of bits included in the check information are configured to have the same logic value. ### Claim 7 (depends on 1) The display device of claim 1, wherein the timing controller configures the check information by using a plurality of consecutive bits in bits constituting the control data packet, and the check information is arranged between the bits of the control data packet or in either a first order or a last order of the bits of the control data packet. ### Claim 8 (depends on 1) The display device of claim 1, wherein, after all display data of a display data packet of the current cycle is inputted, the source driver updates the second control data packet into the first control data packet. ### Claim 9 (depends on 8) The display device of claim 8, wherein the source driver uses the second control data packet, which is updated or maintained in the current cycle, to control display data of the display data packet of a next cycle. ### Claim 10 A source driver of a display device, comprising: a clock-data restoring block configured to receive transmission data cyclically including a clock training packet, a control data packet, and a display data packet, update, when check information included in a first control data packet of a current cycle is normal, a second control data packet with the first control data packet, maintain, when the check information of the first control data packet of the current cycle is abnormal the second control data packet at a state of a previous cycle, restore a clock signal from the clock training packet, and restore control data of the second control data packet and display data of the display data packet; and a display data processing block configured to output a source signal by using the clock signal, the control data, and the display data. ### Claim 11 (depends on 10) The source driver of the display device of claim 10, wherein, when a value of the check information of the first control data packet of the current cycle is different from a value of check information before transmission, the clock-data restoring block determines that the value of the check information is not satisfied with a preset condition and thus the check information is abnormal. ### Claim 12 (depends on 10) The source driver of the display device of claim 10, wherein the check information is configured using a plurality of bits included in the control data of the control data packet. ### Claim 13 (depends on 12) The source driver of the display device of claim 12, wherein the check information is composed of a plurality of consecutive bits in bits of the control data. ### Claim 14 (depends on 12) The source driver of the display device of claim 12, wherein the check information is composed of a plurality of bits including at least one non-consecutive bit, among the bits of the control data. ### Claim 15 (depends on 10) The source driver of the display device of claim 10, wherein the clock-data restoring block recognizes, as the check information, a plurality of consecutive bits arranged at predetermined positions in bits constituting the control data packet, and the check information is arranged between the bits of the control data packet or in either a first order or a last order of the bits of the control data packet. ### Claim 16 (depends on 10) The source driver of the display device of claim 10, wherein, after all display data of a display data packet of the current cycle is inputted, the clock-data restoring block updates the second control data packet into the first control data packet. ### Claim 17 (depends on 16) The source driver of the display device of claim 16, wherein the clock-data restoring block uses the second control data packet, which is updated or maintained in the current cycle, to control display data of the display data packet of a next cycle. ### Claim 18 A packet recognition method of a display device, comprising: a step in which a timing controller configures a control data packet including check information and transmits transmission data cyclically including the control data packet; a step in which a source driver receives the transmission data and determines whether the check information of a first control data packet of a current cycle is normal; a step in which, when the check information of the first control data packet of the current cycle is normal, the source driver updates a second control data packet into the first control data packet; and a step in which, when the check information of the first control data packet of the current cycle is abnormal, the source driver maintains the second control data packet at a state of a previous cycle. ### Claim 19 (depends on 18) The packet recognition method of the display device of claim 18, wherein the timing controller configures the check information by using a plurality of bits included in control data of the control data packet, and the check information is composed of a plurality of consecutive bits in bits of the control data. ### Claim 20 (depends on 18) The packet recognition method of the display device of claim 18, wherein the timing controller configures the check information by using a plurality of bits included in control data of the control data packet, and the check information is composed of a plurality of bits including at least one non-consecutive bit, among the bits of the control data.