# US 10,770,004 B2 · Pixel circuit

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- Number: US 10,770,004 B2
- Document ID: US10770004B2
- Status: Granted
- Kind: B2
- Application number: 16/563,636
- Filed: 2019-09-06
- Published: 2020-05-07
- Granted: 2020-09-08
- Earliest claimed: 2018-11-06
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Sung Hwan Kim; Chul Kyu Kang; Soo Hee Oh; Dong Sun Lee
- Web page: https://patentgrep.com/patent/US10770004B2

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3266: Details of drivers for scan electrodes
- G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/027: Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A pixel circuit, includes: an organic light-emitting diode; a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node; a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line; a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line; a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode.

## Claims

### Claim 1

A pixel circuit, comprising:
an organic light-emitting diode;
a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node;
a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line;
a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line;
a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and
a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode, wherein a gate electrode of the sixth transistor is coupled to the first emission line, and a gate electrode of the eighth transistor is coupled to a second emission line,
wherein a phase of a first emission signal applied to the first emission line is delayed relative to a phase of a second emission signal applied to the second emission line.

### Claim 2 (depends on 1)

The pixel circuit according to claim 1, wherein:
the sixth transistor is coupled between the third node and one electrode of the eighth transistor, and
the eighth transistor is coupled between one electrode of the sixth transistor and the organic light-emitting diode.

### Claim 3 (depends on 1)

The pixel circuit according to claim 1, wherein:
the eighth transistor is coupled between the third node and one electrode of the sixth transistor, and
the sixth transistor is coupled between one electrode of the eighth transistor and the organic light-emitting diode.

### Claim 4 (depends on 1)

The pixel circuit according to claim 1, further comprising:
a third transistor coupled between the first node and the third node and configured such that a gate electrode thereof is coupled to the first scan line.

### Claim 5 (depends on 4)

The pixel circuit according to claim 4, wherein:
the third transistor includes a plurality of third sub-transistors coupled in series between the first node and the third node, and
the fourth transistor includes a plurality of fourth sub-transistors coupled in series between the first node and the initialization power source.

### Claim 6 (depends on 1)

The pixel circuit according to claim 1, wherein a phase of a first scan signal applied to the first scan line is delayed relative to a phase of a second scan signal applied to the second scan line.

### Claim 7 (depends on 6)

The pixel circuit according to claim 6, wherein:
a turn-on level pulse of the first scan signal overlaps a turn-off level pulse of the first emission signal, and
a turn-on level pulse of the second scan signal overlaps a turn-off level pulse of the second emission signal.

### Claim 8 (depends on 7)

The pixel circuit according to claim 7, wherein the turn-on level pulse of the second scan signal is generated when the first emission signal is at a turn-on level.

### Claim 9 (depends on 1)

The pixel circuit according to claim 1, further comprising:
a seventh transistor coupled between the initialization power source and the organic light-emitting diode, wherein a gate electrode of the seventh transistor is coupled to a third scan line.

### Claim 10 (depends on 9)

The pixel circuit according to claim 9, wherein a phase of a third scan signal applied to the third scan line is identical to a phase of a second scan signal applied to the second scan line.

### Claim 11 (depends on 9)

The pixel circuit according to claim 9, wherein a phase of a second scan signal applied to the second scan line is delayed relative to a phase of a third scan signal applied to the third scan line.

### Claim 12 (depends on 9)

The pixel circuit according to claim 9, wherein a phase of a third scan signal applied to the third scan line is delayed relative to a phase of a second scan signal applied to the second scan line.

### Claim 13 (depends on 9)

The pixel circuit according to claim 9, further comprising:
a first gate insulating layer covering source electrodes, drain electrodes, and channels of the first, second, fourth to sixth, and eighth transistors,
wherein the gate electrodes of the first, second, fourth to sixth, and eighth transistors, the first and second scan lines, and the first and second emission lines are on the first gate insulating layer.

### Claim 14 (depends on 13)

The pixel circuit according to claim 13, wherein the second scan line, the first scan line, the first emission line, and the second emission line are sequentially arranged in a first direction on an identical plane.

### Claim 15 (depends on 14)

The pixel circuit according to claim 14, wherein the second emission line perpendicularly overlaps the source electrode and the drain electrode of the eighth transistor.

### Claim 16 (depends on 1)

The pixel circuit according to claim 1, further comprising:
a storage capacitor coupled between the first power source and the first node.