# US 10,769,084 B2 · Out-of band interrupt mapping in MIPI improved inter-integrated circuit communication > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,769,084 B2 - Document ID: US10769084B2 - Status: Granted - Kind: B2 - Application number: 15/474,117 - Filed: 2017-03-30 - Published: 2018-06-28 - Granted: 2020-09-08 - Earliest claimed: 2016-12-22 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Kenneth P. Foust; Duane G. Quiet; Amit Kumar Srivastava - Web page: https://patentgrep.com/patent/US10769084B2 ## CPC - G06F 13/24: using interrupt (G06F13/32 takes precedence) - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Embodiments of the present disclosure may relate to a host controller that includes processing circuitry to identify an inter-integrated circuit (I2C) out-of-band interrupt (OBI) received on a general purpose input-output (GPIO) pin from an I2C device that is unable to generate an improved inter-integrated circuit (I3C) bus an I3C in-band interrupt (IBI). The processing circuitry may further generate, based on the I2C OBI, an I3C IBI that includes information related to the I2C OBI. The host controller may further include transmission circuitry to transmit the I3C IBI on an I3C bus. Other embodiments may be described and/or claimed. ## Claims ### Claim 1 A host controller comprising: processing circuitry to: identify an inter-integrated circuit (I2C) out-of-band interrupt (OBI) received on a general purpose input-output (GPIO) pin from an I2C device that is unable to directly generate an improved inter-integrated circuit (I3C) in-band interrupt (IBI) for consumption by one or more I3C devices coupled to an I3C bus, to which the I2C device and the host controller are also coupled; and generate on the I3C bus, on behalf of the I2C device, based on the I2C OBI, an I3C IBI that includes information related to the I2C OBI, including information indicating to the one or more I3C devices that the I2C OBI is from the I2C device; and transmission circuitry coupled with the processing circuitry, the transmission circuitry to transmit the I3C IBI on the I3C bus, on behalf of the I2C device, for the consumption by the one or more I3C devices. ### Claim 2 (depends on 1) The host controller of claim 1, wherein the information indicating to the I3C devices that the I2C OBI is from the I2C device includes an address related to the I2C device, wherein one or more most significant bits of the address related to the I2C device are inverted. ### Claim 3 (depends on 1) The host controller of claim 1, wherein the information related to the I2C OBI further includes a cause of the I2C OBI. ### Claim 4 (depends on 1) The host controller of claim 1, wherein at least one of the one or more I3C devices to consume the I3C IBI is an I3C peripheral device. ### Claim 5 (depends on 4) The host controller of claim 4, wherein the I3C peripheral device is a sensor. ### Claim 6 An I3C device for an improved inter-integrated circuit (I3C) bus, the device comprising: communication circuitry to identify a received I3C in-band interrupt (IBI) that includes information related to an inter-integrated circuit (I2C) out-of-band interrupt (OBI) from an I2C device, the I3C IBI being received from another device over the I3C bus to which the I3C device the I2C device and the other device are coupled, the other device having transmitted the I3C IBI on behalf of the I2C device which is unable to directly generate the I3C IBI on the I3C bus, and the information related to the I2C OBI includes information indicating to the I3C device that the I2C OBI is from the I2C device; and processing circuity coupled with the communication circuitry, the processing circuitry to: consume the information related to the I2C OBI. ### Claim 7 (depends on 6) The device of claim 6, wherein the information indicating to the I3C device that the I2C OBI is from the I2C device includes an address of the I2C device, wherein one or more higher-order bits of the address of the I2C device are inverted. ### Claim 8 (depends on 6) The device of claim 6, wherein the information related to the I2C OBI further includes a cause of the I2C OBI. ### Claim 9 One or more non-transitory computer readable media comprising computer readable instructions which, when executed by a host controller, cause the host controller to: identify a received inter-integrated circuit (I2C) out-of-band interrupt (OBI) from an I2C device that is unable to directly generate an improved inter-integrated circuit (I3C) in-band interrupt (IBI) on an I3C bus for consumption by one or more I3C devices coupled to the I3C bus, to which the I2C device and the host controller are also coupled; generate the improved inter-integrated circuit (I3C) in-band interrupt (IBI), based on the I2C OBI, and includes information indicating to the one or more I3C devices that the I2C OBI is from the I2C device; and issue the I3C IBI on the I3C bus for consumption by the one or more I3C devices. ### Claim 10 (depends on 9) The one or more non-transitory computer readable media of claim 9, wherein to generate the I3C IBI includes to map the I2C OBI onto the I3C bus. ### Claim 11 (depends on 9) The one or more non-transitory computer readable media of claim 9, wherein to issue the I3C IBI on the I3C bus for the one or more I3C devices to consume, includes to broadcast the I3C IBI on the I3C bus. ### Claim 12 (depends on 11) The one or more non-transitory computer readable media of claim 11, wherein the information indicating to the one or more I3C devices that the I2C OBI is from the I2C device includes a slave address of the I2C device, and wherein higher-order bits of the slave address are inverted. ### Claim 13 (depends on 9) The one or more non-transitory computer readable media of claim 9, wherein the I3C IBI includes data regarding a cause of the I2C OBI. ### Claim 14 (depends on 13) The one or more non-transitory computer readable media of claim 13, wherein to issue the I3C IBI includes to: interrogate the I2C device for the cause of the I2C OBI; and retrieve the data regarding the cause of the I2C OBI from the I2C device. ### Claim 15 (depends on 14) The one or more non-transitory computer readable media of claim 14, wherein to interrogate the I2C device includes to interrogate the I2C device through the I3C bus. ### Claim 16 (depends on 15) The one or more non-transitory computer readable media of claim 15, wherein to interrogate the I2C device through the I3C bus includes to read an event status register of the I2C device. ### Claim 17 One or more non-transitory computer readable media comprising computer readable instructions which, when executed by a slave device on an improved inter-integrated circuit (I3C) bus, cause the slave device on the I3C bus to: identify an I3C in-band interrupt (IBI) received through the I3C bus, the I3C IBI including information related to an inter-integrated circuit (I2C) out-of-band interrupt (OBI) on which the I3C IBI is based, the I2C OBI being originated from an I2C device and provided to a master device, which in turn issued the I3C IBI on behalf of the I2C device, wherein the master device, the slave device and the I2C device are all coupled to the I3C bus, and the I2C device is unable to directly generate the I3C IBI on the I3C bus; interpret the information related to the I2C OBI included in the I3C IBI, wherein the information related to the I2C OBI includes source information related to the I2C OBI identifying the I2C OBI is from the I2C device; and identify, based on the source information related to the I2C OBI, the I2C device that generated the I2C OBI. ### Claim 18 (depends on 17) The one or more non-transitory computer readable media of claim 17, wherein the source information related to the I2C OBI includes an address of the I2C device that generated the I2C OBI, and wherein one or more higher-order bits of the address of the I2C device are inverted. ### Claim 19 (depends on 17) The one or more non-transitory computer readable media of claim 17, wherein the information related to the I2C OBI includes a cause of the I2C OBI.