# US 10,769,014 B2 · Disposable parity

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- Number: US 10,769,014 B2
- Document ID: US10769014B2
- Status: Granted
- Kind: B2
- Application number: 16/235,385
- Filed: 2018-12-28
- Published: 2020-07-02
- Granted: 2020-09-08
- Earliest claimed: 2018-12-28
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Giuseppe Cariello
- Web page: https://patentgrep.com/patent/US10769014B2

## CPC

- G06F 3/0688: {Non-volatile semiconductor memory arrays}
- G06F 11/1068: {in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence)}
- G06F 3/0619: {in relation to data integrity, e.g. data losses, bit errors}
- G06F 3/0647: {Migration mechanisms}
- G06F 3/065: {Replication mechanisms}
- G06F 3/0658: {Controller construction arrangements}
- G06F 3/0665: {at area level, e.g. provisioning of virtual or logical volumes}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 11/108: {Parity data distribution in semiconductor storages, e.g. in SSD}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/0253: {Garbage collection, i.e. reclamation of unreferenced memory}
- G06F 2212/7209: Validity control, e.g. using flags, time stamps or sequence numbers
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

Devices and techniques for disposable parity are described herein. First and second portions of data can be obtained, and respective parity values stored in adjacent memory locations. An entry mapping the respective parity values to the first and second portions of data is updated when the parity values are stored. If an error occurs when writing a portion of data, the mapping entry is used to retrieve the parity data to correct the error. Otherwise, the parity data is discarded.

## Claims

### Claim 1

An array controller for disposable parity in a NAND device, the array controller comprising:
a volatile memory; and
processing circuitry to:
obtain a first portion of data;
store a first parity value for the first portion of data in a first memory location;
update a data-to-parity table with a first entry that includes a mapping between the first portion of data and the first memory location;
obtain a second portion of data;
store a second parity value for the second portion of data in a second memory location that is adjacent to the first memory location;
update the data-to-parity table with a second entry that including a mapping between the second portion of data and the second memory location;
detect an error during a write of the first portion of data;
use the first parity value via a lookup in the data-to-parity table to correct the error; and
discard the first memory location and second memory location in response to a successful write of the first data portion and the second data portion.

### Claim 2 (depends on 1)

The array controller of claim 1, wherein the first data portion and the second data portion are a block as defined by the NAND device.

### Claim 3 (depends on 2)

The array controller of claim 2, wherein the first data portion is a user data block received at the NAND device.

### Claim 4 (depends on 3)

The array controller of claim 3, wherein the second data portion is a garbage collection (GC) block.

### Claim 5 (depends on 1)

The array controller of claim 1, wherein the first memory location and second memory location are segments of a circular buffer.

### Claim 6 (depends on 1)

The array controller of claim 1, wherein the first memory location and the second memory location are originally stored in volatile memory.

### Claim 7 (depends on 6)

The array controller of claim 6, wherein the processing circuitry is arranged to:
flush the volatile memory to a non-volatile memory in response to a trigger; and
update the entries of the data-to-parity table that correspond to flushed parity values to point to the non-volatile memory.

### Claim 8 (depends on 1)

The array controller of claim 1, wherein there is no error before the successful write of the second portion of data, and wherein the second parity value is discarded without being used.

### Claim 9

A method for disposable parity in a NAND device, the method comprising:
obtaining a first portion of data;
storing a first parity value for the first portion of data in a first memory location;
updating a data-to-parity table with a first entry that includes a mapping between the first portion of data and the first memory location;
obtaining a second portion of data;
storing a second parity value for the second portion of data in a second memory location that is adjacent to the first memory location;
updating the data-to-parity table with a second entry that including a mapping between the second portion of data and the second memory location;
detecting an error during a write of the first portion of data;
using the first parity value via a lookup in the data-to-parity table to correct the error; and
discarding the first memory location and second memory location in response to a successful write of the first data portion and the second data portion.

### Claim 10 (depends on 9)

The method of claim 9, wherein the first data portion and the second data portion are a block as defined by the NAND device.

### Claim 11 (depends on 10)

The method of claim 10, wherein the first data portion is a user data block received at the NAND device.

### Claim 12 (depends on 11)

The method of claim 11, wherein the second data portion is a garbage collection (GC) block.

### Claim 13 (depends on 9)

The method of claim 9, wherein the first memory location and second memory location are segments of a circular buffer.

### Claim 14 (depends on 9)

The method of claim 9, wherein the first memory location and the second memory location are originally stored in volatile memory.

### Claim 15 (depends on 14)

The method of claim 14, comprising:
flushing the volatile memory to a non-volatile memory in response to a trigger; and
updating the entries of the data-to-parity table that correspond to flushed parity values to point to the non-volatile memory.

### Claim 16 (depends on 9)

The method of claim 9, wherein there is no error before the successful write of the second portion of data, and wherein the second parity value is discarded without being used.

### Claim 17

A machine readable medium including instructions for disposable parity in a NAND device, the instructions, when executed by processing circuitry, cause the processing circuitry to perform operations comprising:
obtaining a first portion of data;
storing a first parity value for the first portion of data in a first memory location;
updating a data-to-parity table with a first entry that includes a mapping between the first portion of data and the first memory location;
obtaining a second portion of data;
storing a second parity value for the second portion of data in a second memory location that is adjacent to the first memory location;
updating the data-to-parity table with a second entry that including a mapping between the second portion of data and the second memory location;
detecting an error during a write of the first portion of data;
using the first parity value via a lookup in the data-to-parity table to correct the error; and
discarding the first memory location and second memory location in response to a successful write of the first data portion and the second data portion.

### Claim 18 (depends on 17)

The machine readable medium of claim 17, wherein the first data portion and the second data portion are a block as defined by the NAND device.

### Claim 19 (depends on 18)

The machine readable medium of claim 18, wherein the first data portion is a user data block received at the NAND device.

### Claim 20 (depends on 19)

The machine readable medium of claim 19, wherein the second data portion is a garbage collection (GC) block.

### Claim 21 (depends on 17)

The machine readable medium of claim 17, wherein the first memory location and second memory location are segments of a circular buffer.

### Claim 22 (depends on 17)

The machine readable medium of claim 17, wherein the first memory location and the second memory location are originally stored in volatile memory.

### Claim 23 (depends on 22)

The machine readable medium of claim 22, wherein the operations comprise:
flushing the volatile memory to a non-volatile memory in response to a trigger; and
updating the entries of the data-to-parity table that correspond to flushed parity values to point to the non-volatile memory.

### Claim 24 (depends on 17)

The machine readable medium of claim 17, wherein there is no error before the successful write of the second portion of data, and wherein the second parity value is discarded without being used.