# US 10,768,831 B2 · Non-persistent unlock for secure memory

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- Number: US 10,768,831 B2
- Document ID: US10768831B2
- Status: Granted
- Kind: B2
- Application number: 16/235,407
- Filed: 2018-12-28
- Published: 2020-07-02
- Granted: 2020-09-08
- Earliest claimed: 2018-12-28
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Brent Keeth; Naveh Malihi
- Web page: https://patentgrep.com/patent/US10768831B2

## CPC

- G06F 3/0622: {in relation to access}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 3/0637: {Permissions}
- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/0673: {Single storage device}
- G06F 21/78: to assure secure storage of data (address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00)
- G11C 7/24: Memory cell safety or protection circuits, e.g. arrangements for preventing inadvertent reading or writing; Status cells; Test cells
- G06F 21/6245: {Protecting personal data, e.g. for financial or medical purposes}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

Apparatuses and methods related to implementing a non-persistent unlock state for secure memory. Implementing the non-persistent unlock state can include verifying whether an access command is authorized to access a protected region of a memory array. The authorization can be verified utilizing a key and a memory address corresponding to the access command. If an access command is authorized to access a protected region, then a row of the memory array corresponding to the access command can be activated following the placement of the protected region in a non-persistent unlocked mode. If the row of the memory array corresponding to the access command is activated, then the protected region can be placed on a locked mode.

## Claims

### Claim 1

An apparatus, comprising:
a memory array;
a key register configured to store a key used to determine whether a plurality of access commands are allowed access to a protected region of the memory array, wherein the plurality of access commands are collectively executable to access data stored in the memory array or write data to the memory array;
a protected region register configured to store addresses defining the protected region;
control circuitry configured to, responsive to receiving the plurality of access commands:
determine whether to allow access to an address corresponding to the plurality of access commands based on:
whether the address is within the protected region; and
whether a plurality of keys corresponding to the plurality of access commands match the key stored in the key register;
responsive to determining to allow access to the address, set a mode register to a first mode to enable a row driver; and
responsive to determining not to allow access to the address, set the mode register to a second mode to disable the row driver.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the plurality of access commands correspond to an access command received by the control circuitry from a host.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the control circuitry is configured to receive the plurality of access commands and wherein each of the plurality of access commands is associated with a different one of the plurality of keys.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the control circuitry is further configured to determine whether each of the plurality of keys matches the key prior to allowing access to the address.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the plurality of access commands are configured for sequential execution in association with accessing the memory array.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the control circuitry is configured to provide access to the address independently for each of the plurality of access commands.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein each of the plurality of access commands is one of a pre-charge command, an activate command, a read command, or a write command.

### Claim 8

A method comprising:
receiving, at a memory device, a command comprising an indication of an address of a memory array;
determining, based at least in part on the indication in the command, that the address is within a protected region of the memory array as indicated by a protected region register;
responsive to determining that the address is within the protected region, determining whether a first key associated with the command matches a second key stored in a key register of the memory device;
responsive to determining that the first key matches the second key, setting a mode register to a first mode to enable a row driver; and
responsive to enabling the row driver, setting the mode register to a second mode to disable the row driver.

### Claim 9 (depends on 8)

The method of claim 8, further comprising setting the mode register to the first mode to allow the row driver to activate a row of the memory array corresponding to the address.

### Claim 10 (depends on 8)

The method of claim 8, further comprising:
receiving a subsequent command to the address, wherein the subsequent command is associated with a third key;
determining whether the address is within the protected region of the memory array as indicated by the protected region register;
responsive to determining that the address is within the protected region, determining whether the third key associated with the subsequent command matches the second key stored in the key register of the memory device;
responsive to determining that the third key matches the second key, setting the mode register to the first mode to enable the row driver; and
subsequent to activating the row driver, setting the mode register to the second mode to disable the row driver.

### Claim 11 (depends on 8)

The method of claim 8, wherein responsive to determining that the address is not within the protected region or that the key does not match the second key, setting the mode register to the second mode.

### Claim 12 (depends on 8)

The method of claim 8, wherein responsive to determining that the address is not within the protected region or that the key does not match the second key, refrain from modifying the mode register.

### Claim 13 (depends on 8)

The method of claim 8, further comprising:
receiving a subsequent command to an activated row, wherein the subsequent command is associated with the address;
determining whether the address is within the protected region of the memory array as indicated by the protected region register;
responsive to determining that the address is within the protected region, determining whether the third key associated with the subsequent command matches the second key stored in the key register of the memory device;
responsive to determining that the third key matches the second key, setting the mode register to the first mode to enable the row driver; and
subsequent to activating the row driver, setting the mode register to the second mode to disable the row driver.

### Claim 14

A system, comprising:
a host comprising a processing resource configured to execute an operating system (OS); and
a memory device configured to:
responsive to receiving an access command from the host, determine whether an address corresponding to the access command is in a protected region;
responsive to determining that the address is in the protected region, determine whether a second key corresponding to the access command matches a first key stored in a key register of the memory device;
responsive to determining that the second key matches the first key set a mode register to a first mode to enable a row driver;
and
responsive to determining that the second key does not match the first key, set the mode register to a second mode to disable the row driver.

### Claim 15 (depends on 14)

The system of claim 14, wherein the memory device is further configured to:
associate the address with each of the plurality of access commands; and
responsive to determining that the address is in the protected region, determine whether the second key associated with each of the plurality of access commands matches the first key.

### Claim 16 (depends on 14)

The system of claim 14, wherein the memory device is further configured to process the plurality of access commands based on the second key provided with the access command.

### Claim 17 (depends on 16)

The system of claim 16, wherein the memory device is further configured to, after processing each of the plurality of access commands, set the mode register to the second mode to prevent the row decoder from activating rows of the memory array.