# US 10,768,496 B2 · Thin film transistor substrate and display panel > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,768,496 B2 - Document ID: US10768496B2 - Status: Granted - Kind: B2 - Application number: 15/779,103 - Filed: 2017-02-17 - Published: 2018-12-06 - Granted: 2020-09-08 - Earliest claimed: 2016-02-24 - Assignees: Sharp Kabushiki Kaisha - Applicants: Sharp Kabushiki Kaisha - Inventors: Seiichi Uchida; Kuniaki Okada; Naoki Ueda; Takahiro Sasaki - Web page: https://patentgrep.com/patent/US10768496B2 ## CPC - G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} - G02F 1/133345: {Insulating layers (G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence)} - G02F 1/133512: {Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence)} - G02F 1/133514: {Colour filters} - G02F 1/136227: {Through-hole connection of the pixel electrode to the active element through an insulation layer} - G02F 1/136286: {Wiring, e.g. gate line, drain line} - G09F 9/30: in which the desired character or characters are formed by combining individual elements (panels comprising a number of electrodes in a single cell controlling light arriving from an independent light source, e.g. electro-optical or magneto-optical cell, G02F1/00) - H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes} - H10D 30/6723: {having light shields} - H10D 30/673: {characterised by the shapes, relative sizes or dispositions of the gate electrodes} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/451: {characterised by the compositions or shapes of the interlayer dielectrics} - H10D 86/60: wherein the TFTs are in active matrices - H10W 20/48: Insulating materials thereof - G02F 2201/123: pixel - G02F 2201/40: Arrangements for improving the aperture ratio - G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS - G09F: DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract An array board 11b includes a gate line 19, a TFT 17, a pixel electrode 18, a display pixel PX, and a second interlayer insulation film 27. The TFT 17 includes a gate electrode 17a formed from a part of the gate line 19, a channel section 17d formed from an oxide semiconductor film 24, a source section 17b connected to one end of the channel section 17d, and a drain section 17c connected to another end of the channel section 17d and formed from the oxide semiconductor film 24 having resistance lower than the channel section 17d. The pixel electrode 18 is connected to the drain section 17c. The display pixel PX includes the TFT 17 and the pixel electrode 18. The second interlayer insulation film 27 has a second hole in a position overlapping the pixel electrode and the drain section 17c and not overlapping the gate electrode 17a. ## Claims ### Claim 1 A thin film transistor substrate comprising: a gate line; a thin film transistor at least including a gate electrode formed from a part of the gate line, a channel section formed from an oxide semiconductor film and disposed such that a part of the channel section overlaps the gate electrode, a source section connected to one end of the channel section, and a drain section connected to another end of the channel section and formed from the oxide semiconductor film having resistance lower than that of the channel section, a pixel electrode a part of which overlaps the drain section and connected to the drain section; a pixel at least including the thin film transistor and the pixel electrode; an insulation film disposed between the pixel electrode and the drain section and having a hole in a position overlapping the pixel electrode and the drain section and not overlapping the gate electrode; and a lower insulation film included in a lower layer of the insulation film and having a lower hole overlapping a whole area of the drain section. ### Claim 2 (depends on 1) The thin film transistor substrate according to claim 1, wherein the pixel includes multiple pixels that are arranged while having a light blocking area between adjacent pixels, and the gate line is arranged to overlap the light blocking area. ### Claim 3 (depends on 1) The thin film transistor substrate according to claim 1, wherein the insulation film is made of material containing hydrogen. ### Claim 4 (depends on 1) The thin film transistor substrate according to claim 1, wherein the pixel includes multiple pixels that are arranged at least in an extending direction in which the gate line extends, and the insulation film and the lower insulation film are formed such that the hole and the lower hole are smaller in the extending direction than an arrangement interval of the pixels and the hole and the lower hole partially overlap each other. ### Claim 5 (depends on 1) The thin film transistor substrate according to claim 1, wherein the pixel includes multiple pixels that are arranged at least in an extending direction in which the gate line extends, and the lower insulation film is formed such that the lower hole extends over the pixels that are adjacent to each other in the extending direction. ### Claim 6 (depends on 1) The thin film transistor substrate according to claim 1, wherein the pixel includes multiple pixels that are arranged at least in an extending direction in which the gate line extends, and the insulation film is formed such that the hole extends over the pixels that are adjacent to each other in the extending direction. ### Claim 7 (depends on 1) The thin film transistor substrate according to claim 1, wherein the thin film transistor includes the source section, the channel section, and the drain section that are arranged in an arrangement direction, and the channel section and the drain section extend in an extending direction, and the arrangement direction is parallel to the extending direction. ### Claim 8 (depends on 1) A display panel comprising: the thin film transistor substrate according to claim 1; and a counter substrate bonded to the thin film transistor substrate. ### Claim 9 (depends on 8) The display panel according to claim 8, further comprising: a liquid crystal layer arranged between the thin film transistor substrate and the counter substrate and formed from liquid crystal material that is aligned vertical to surfaces of the thin film transistor substrate and the counter substrate.