# US 10,768,290 B2 · Method and apparatus for generating a frequency estimation signal

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- Number: US 10,768,290 B2
- Document ID: US10768290B2
- Status: Granted
- Kind: B2
- Application number: 15/835,186
- Filed: 2017-12-07
- Published: 2018-06-14
- Granted: 2020-09-08
- Earliest claimed: 2016-12-13
- Assignees: NXP B.V.
- Applicants: NXP B.V.
- Inventors: Yu Lin; Erwin Janssen; Konstantinos Doris; Vladislav Dyachenko; Athon Zanikopoulos
- Web page: https://patentgrep.com/patent/US10768290B2

## CPC

- G01S 13/341: {wherein the rate of change of the transmitted frequency is adjusted to give a beat of predetermined constant frequency, e.g. by adjusting the amplitude or frequency of the frequency-modulating signal}
- G01S 13/342: {using sinusoidal modulation}
- G06F 1/022: {Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers (G06F1/025, G06F1/03 take precedence)}
- H03D 7/1433: {using bipolar transistors (H03D7/145 takes precedence)}
- H03D 7/1458: {Double balanced arrangements, i.e. where both input signals are differential}
- H03D 7/1466: {Passive mixer arrangements}
- G01R 23/04: adapted for measuring in circuits having distributed constants
- H03J 3/04: Arrangements for compensating for variations of physical values, e.g. temperature
- G01S: RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03D: DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER (masers, lasers H01S; circuits capable of acting both as modulator and demodulator H03C; details applicable to both modulators and frequency-changers H03C; demodulating pulses H03K9/00; transforming types of pulse modulation H03K11/00; coding, decoding or code conversion, in general H03M; repeater stations H04B7/14; demodulators adapted for AC systems of digital information transmission H04L27/00; synchronous demodulators adapted for colour television H04N9/66)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- H03J: TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS

## Abstract

A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal. The frequency estimation signal generator component comprises a counter component arranged to sequentially output a sequence of control signal patterns over a plurality of digital control signals under the control of an oscillating signal derived from the received input frequency signal terns. The frequency estimation signal generator further comprises a continuous waveform generator component arranged to receive the plurality of digital control signals and a weighted analogue signal for each of the received digital control signals, and to output a continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding digital control signals comprise an asserted logical state. The frequency conversion component is arranged to derive the frequency estimation signal from the continuous waveform signal output by the continuous waveform generator component.

## Claims

### Claim 1

A frequency estimation signal generator component arranged to receive an input frequency signal and to generate therefrom a frequency estimation signal, the frequency estimation signal generator component comprising:
a counter component arranged to receive an oscillating signal derived by dividing the input frequency signal with a divider component and to output a plurality of physically separate digital control signals, wherein the counter component is arranged to output a temporal sequence of control signal patterns for each of the physically separate digital control signals and is controllable by the received oscillating signal to sequentially step through the control signal patterns; and
a continuous waveform generator component arranged to receive the plurality of physically separate digital control signals output by the counter component and a weighted analogue signal for each of the received physically separate digital control signals, and to output a continuous waveform sinusoidal signal comprising a sum of the weighted analogue signals for which the corresponding physically separate digital control signals comprise an asserted logical state;
wherein the frequency conversion component is arranged to derive the frequency estimation signal from the continuous waveform sinusoidal signal output by the continuous waveform generator component.

### Claim 2 (depends on 1)

The frequency estimation signal generator component of claim 1, wherein the counter component is arranged to sequentially step through the control signal patterns upon every n cycle(s) of the received oscillating signal, where n≥1.

### Claim 3 (depends on 1)

The frequency estimation signal generator component of claim 1, wherein the counter component is arranged to output a set of M digital control signals made up of a first subset of M/2 down control signals, and a second subset of M/2 up control signals.

### Claim 4 (depends on 3)

The frequency estimation signal generator component of claim 3, wherein the counter component is arranged to generate the sequence of control signal patterns comprising:
a down asserting phase during which the subset of down control signals are sequentially transitioned from un-asserted states to asserted states;
a down de-asserting phase during which the subset of down control signals are sequentially transitioned from asserted states to un-asserted states;
an up asserting phase during which the subset of up control signals are sequentially transitioned from un-asserted states to asserted states; and
an up de-asserting phase during which the subset of up control signals are sequentially transitioned from asserted states to un-asserted states.

### Claim 5 (depends on 3)

The frequency estimation signal generator component of claim 3, wherein the continuous waveform generator component comprises:
a set of M switch drivers, each switch driver arranged to receive one of the control signals output by the counter component and to output a driver signal derived from the received control signal; and
a set of switching components arranged to receive the driver signals output by the switch drivers and the weighted analogue signals and to collectively generate the continuous waveform signal comprising a sum of the weighted analogue signals for which the corresponding driver signals comprise the asserted logical state.

### Claim 6 (depends on 5)

The frequency estimation signal generator component of claim 5, wherein each switching component comprises a tri-state operation and is arranged to receive a pair of driver signals and a pair of weighted analogue signals, and to steer the weighted analogue signals to an up output, a down output or to both outputs, depending on the received driver signals.

### Claim 7 (depends on 6)

The frequency estimation signal generator component of claim 6, wherein each switching component is arranged to receive a pair of driver signals derived from complementary up and down control signals and a pair of equally weighted analogue signals.

### Claim 8 (depends on 5)

The frequency estimation signal generator component of claim 5, wherein:
the analogue signals at the up outputs of the set of switching components are combined to generate an up voltage signal;
the analogue signals at the down outputs of the set of switching components are combined to generate a down voltage signal; and
the continuous waveform signal is generated based on the resulting up and down voltage signals.

### Claim 9 (depends on 1)

The frequency estimation signal generator component of claim 1, wherein the sequence of control signal patterns generated by the counter component and the weighted analogue signals are arranged such that the continuous waveform signal output by the continuous waveform generator comprises a sinusoidal profile.

### Claim 10 (depends on 1)

The frequency estimation signal generator component of claim 1, wherein the weighted analogue signals comprise weighted current signals, and the continuous waveform signal output by the continuous waveform generator comprises a continuous summed current signal applied to a load to convert the continuous summed current signal into a continuous waveform voltage signal.

### Claim 11 (depends on 1)

The frequency estimation signal generator component of claim 1, wherein the frequency estimation signal generator component further comprises a divider component arranged to receive the input frequency signal and to perform frequency division of the input frequency signal to generate the oscillating signal received by the counter component.

### Claim 12 (depends on 1)

The frequency estimation signal generator component of claim 1, wherein the frequency estimation signal generator component further comprises a low-order filter arranged to perform low-order filtering of the frequency estimation signal.

### Claim 13 (depends on 1)

A frequency monitor circuit for performing run-time frequency monitoring of an input signal, the frequency monitor circuit comprising at least one frequency estimation signal generator component according to claim 1.

### Claim 14 (depends on 13)

The frequency monitor of claim 13, wherein the frequency monitor circuit is arranged to perform run-time frequency monitoring of an oscillator signal for a Frequency-Modulated Continuous Wave, FMCW, automotive radar system.

### Claim 15

A method of generating a frequency estimation signal for performing run-time frequency monitoring of an input frequency signal, the method comprising:
receiving the input frequency signal;
sequentially outputting a temporal sequence of control signal patterns over a plurality of physically separate digital control signals under the control of an oscillating signal derived by dividing the received input frequency signal;
receiving a weighted analogue signal for each of the physically separate digital control signals;
outputting a continuous waveform sinusoidal signal comprising a sum of the weighted analogue signals for which the corresponding physically separate digital control signals comprise an asserted logical state; and
deriving the frequency estimation signal from the continuous waveform sinusoidal signal.