# US 10,767,224 B2 · High data rate integrated circuit with power management

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- Number: US 10,767,224 B2
- Document ID: US10767224B2
- Status: Granted
- Kind: B2
- Application number: 16/110,341
- Filed: 2018-08-23
- Published: 2019-05-09
- Granted: 2020-09-08
- Earliest claimed: 2014-12-18
- Assignees: Life Technologies Corporation
- Applicants: Life Technologies Corporation
- Inventors: Keith G. Fife; Jungwook Yang
- Web page: https://patentgrep.com/patent/US10767224B2

## CPC

- C12Q 1/6874: involving nucleic acid arrays, e.g. sequencing by hybridisation
- G01N 27/4145: {specially adapted for biomolecules, e.g. gate electrode with immobilised receptors}
- G01N 27/4148: {Integrated circuits therefor, e.g. fabricated by CMOS processing}
- G01N 35/00712: {Automatic status testing, e.g. at start-up or periodic}
- G01N 35/00871: {Communications between instruments or with remote terminals}
- G01N 2035/00881: {network configurations}
- C12Q: MEASURING OR TESTING PROCESSES INVOLVING ENZYMES, NUCLEIC ACIDS OR MICROORGANISMS (immunoassay G01N33/53); COMPOSITIONS OR TEST PAPERS THEREFOR; PROCESSES OF PREPARING SUCH COMPOSITIONS; CONDITION-RESPONSIVE CONTROL IN MICROBIOLOGICAL OR ENZYMOLOGICAL PROCESSES
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)

## Abstract

A sensor device includes a sensor array and a flow cell in fluid communication with the sensor array. Bias circuitry apply bias arrangements to the sensor array to produce sensor data. Peripheral circuitry coupled to the bias circuitry produces streams of data from the sensor array, the peripheral circuitry having an active mode and an idle mode. Logic to switch the peripheral circuitry between the active mode and the idle mode to control power consumption is provided. A temperature sensor may be included, and the logic can operate with feedback to switch between the active mode and the idle mode to maintain the temperature within an operating range.

## Claims

### Claim 1

A method for operating a sequencing system including a sensor array, comprising:
applying a sequence of alternating flows of reactant solutions during active intervals and flows of wash solutions during wash intervals;
applying bias arrangements to the sensor array to produce sensor data;
producing streams of sensor data from the sensor array using peripheral circuitry having an active mode and an idle mode; and
switching the peripheral circuitry between the active mode and the idle mode to control power consumption.

### Claim 2 (depends on 1)

The method of claim 1, including using feedback responsive to temperature of the array to switch between the active mode and the idle mode to maintain the temperature within an operating range.

### Claim 3 (depends on 1)

The method of claim 1, wherein the peripheral circuitry includes:
converting, with conversion circuitry responsive to configuration parameters the sensor data into a plurality of streams of digital data;
receiving, at a plurality of transmitters, corresponding streams of data from the plurality of streams from the conversion circuitry and transmitting the data to corresponding receivers; and
producing, at a sequencer which operates bias circuitry, frames of sensor data at a frame rate, operates the conversion circuitry to convert the sensor data at the frame rate; and further comprising:
applying a first set of one or more configuration parameters to the conversion circuitry in the active mode, and a second set of one or more configuration parameters to the conversion circuitry in the idle mode and maintaining transmission of data using the plurality of transmitters during the idle mode.

### Claim 4 (depends on 3)

The method of claim 3, including applying a third set of one or more configuration parameters to the bias circuitry in the active mode, and a fourth set of one or more configuration parameters to the bias circuitry in the idle mode.

### Claim 5 (depends on 3)

The method of claim 3, wherein the second set of configuration parameters is adapted to preserve operational readiness and to reduce power consumption.

### Claim 6 (depends on 1)

The method of claim 1, including maintaining communication links with remote receivers during the active mode and the idle mode.

### Claim 7 (depends on 1)

The method of claim 1, including:
operating in the active mode for a first number of frames in a time interval overlapping with the active interval and for a second number of frames in the idle mode in a time interval overlapping with an immediately following idle interval; and
adjusting the first and second numbers to control power consumption.

### Claim 8 (depends on 7)

The method of claim 7, wherein an average flow rate during the active interval is greater than an average flow rate during the wash interval.

### Claim 9 (depends on 1)

The method of claim 1, wherein the sensor array comprises chemically sensitive field effect transistors.

### Claim 10 (depends on 1)

The method of claim 1, wherein the peripheral circuitry includes an analog-to-digital ADC converter, and including:
setting a first effective number of bits parameter for the analog-to-digital converter in the active mode, and a second effective number of bits parameter, lower than the first, for the analog-to-digital converter in the idle mode.

### Claim 11 (depends on 1)

The method of claim 1, wherein the peripheral circuitry includes a digital-to-analog DAC converter to produce a reference ramp signal, including:
setting a DAC parking address parameter for the digital-to-analog converter in the idle mode.

### Claim 12 (depends on 1)

The method of claim 1, wherein the peripheral circuitry includes a gray code counter to produce a digital count value, and including:
setting a gray code counter parking address parameter in the idle mode.

### Claim 13 (depends on 1)

The method of claim 1, wherein the peripheral circuitry includes a comparator, and including:
setting a first comparator power level parameter in the active mode, and a second comparator power level parameter, lower than the first, in the idle mode.

### Claim 14 (depends on 1)

The method of claim 1, wherein the peripheral circuitry includes a latch for each column of the array, and including:
setting a latch state in the idle mode.