Calibrating time-interleaved switched-capacitor track-and-hold circuits and amplifiers
AssigneeAnalog Devices, Inc.
InventorsAhmed Mohamed Abdelatty Ali, Paridhi Gulati, Bryan S. Puckett, Huseyin Dinc
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AssigneeAnalog Devices, Inc.
InventorsAhmed Mohamed Abdelatty Ali, Paridhi Gulati, Bryan S. Puckett, Huseyin Dinc
Estimating the term…
Background calibration techniques can effectively to correct for memory, kick-back, and order-dependent errors in interleaved switched-capacitor track-and-hold (T/H) circuits and amplifiers. The techniques calibrate for errors in both the track/sample phase and the hold-phase, and account for the effects of interleaving, buffer/amplifier sharing, incomplete resetting, incomplete settling, chopping, and randomization on the offset, gain, memory, and kick-back errors. Moreover, the techniques can account for order-dependent and state-dependent hold-phase non-linearities. By correcting for these errors, the proposed techniques improve the noise performance, linearity, gain/offset matching, frequency response (and bandwidth), and order-dependence errors. The techniques also help increase the speed (sample rate and bandwidth) and linearity of T/H circuits and amplifiers while simplifying the analog circuitry and clocking needed. These techniques comprehensively account for various memory, kick-back, and order-dependent effects in a unified framework.
A method for addressing errors in time-interleaved sampling networks, comprising:
A method for addressing errors in time-interleaved sampling networks, comprising:
A system with calibration, comprising:
Dependencies are inferred from the claim text.