Switched capacitor circuit and analog-to-digital converter device

An analog-to-digital converter device, comprising:

• a switched capacitor circuit configured to sample an input signal according to a plurality of clock signals;
• and
• a successive approximation register (SAR) circuitry configured to perform an analog-to-digital conversion on a sampled input signal according to a conversion clock signal, in order to generate a digital output;
• wherein the switched capacitor circuit comprises:
• a first capacitor configured to store a first residue signal associated with the sample input signal;
• and
• a second capacitor configured to store a second residue signal that is generated based on the first residue signal in a previous conversion phase, wherein the first capacitor and the second capacitor are stacked in series, in order to provide a combination of the first residue signal and the second residue signal to the SAR circuitry in the analog-to-digital conversion.