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US 10,763,869 B2Granted
Apparatus for digital frequency synthesizers and associated methods
AssigneeSilicon Laboratories Inc.
InventorJohn M. Khoury
Life of this patent
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Abstract
An apparatus includes a digital frequency synthesizer (DFS). The DFS includes a time-to-digital converter (TDC) to provide an output signal that represents a phase difference between a reference signal and a feedback signal. The DFS further includes a scaling circuit, which has an adaptively changed gain, to provide a scaled residue signal used to cancel an effect of the residue signal in the DFS.
Claims20
An apparatus, comprising:
- a digital frequency synthesizer (DFS) comprising:
- a time-to-digital converter (TDC) to provide an output signal that represents a phase difference between a reference signal and a feedback signal;
- a residue error circuit coupled to the TDC to provide a variance of a jitter;
- and
- a scaling circuit, having an adaptively adjusted gain, to provide a scaled residue signal used to cancel an effect of the residue signal in the DFS.
2 more elements
An apparatus, comprising:
- a digital frequency synthesizer (DFS) comprising:
- a time-to-digital converter (TDC) to provide an output signal in response to a phase difference between a reference signal and a feedback signal;
- a sigma-delta modulator (SDM) that provides an output signal and a residue signal;
- a scaling circuit, having an adaptively adjusted gain, to scale the residue signal to provide a scaled residue signal;
- a subtracter to subtract the scaled residue signal from the output signal of the TDC to generate a difference signal;
- and
- a residue error circuit coupled to the TDC to provide a variance of a jitter of the difference signal.
4 more elements
A method of generating a signal having a desired frequency by using a digital frequency synthesizer (DFS), the method comprising:
- converting, by using a time-to-digital converter (TDC), a phase difference between a reference signal and a feedback signal to a digital signal;
- scaling, by using an adaptively adjusted gain, a residue signal from a sigma-delta modulator (SDM) to generate a scaled signal;
- subtracting a scaled version of a residue signal from the digital signal to generate a difference signal;
- and
- generating, by using a residue error circuit, a variance of a jitter of the difference signal.
2 more elements
Dependencies are inferred from the claim text.