Semiconductor integrated circuit
AssigneeFuji Electric Co., Ltd.
InventorTakahide Tanaka
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes a level shifter formed in a portion of a high-voltage junction termination structure and an isolation region formed surrounding the periphery of the level shifter. The level shifter includes a p-type base region formed in an upper portion of a p− substrate, an n− source region formed contacting the base region, an n+ drift region formed contacting the base region, a drain region formed in an upper portion of the drift region, and a control electrode that controls the voltage of the base region. In a planar pattern, an effective channel width defined by the width of the base region in a portion that overlaps with the control electrode is greater than the width of the drain region as measured along the same direction as the effective channel width.
Claims14
A semiconductor integrated circuit, comprising:
- a high-side circuit region;
- a high-voltage junction termination structure formed in a ring shape in an area surrounding the high-side circuit region in a plan view;
- a level shifter formed in a portion of the high-voltage junction termination structure;
- and
- an isolation region that is formed surrounding a periphery of the level shifter and that electrically isolates the high-side circuit region from the level shifter,
- wherein the level shifter includes:
- a base region of a first conductivity type formed in an upper portion of a semiconductor substrate of the first conductivity type, an impurity concentration of the base region being higher than that of the substrate;
- a first main electrode contact region of a second conductivity type formed contacting the base region in an upper portion of the substrate, the second conductivity type being different from the first conductivity type;
- a drift region of the second conductivity type formed contacting the base region in an upper portion of the substrate at a side opposite to a side of the first main electrode contact region in the plan view;
- a second main electrode contact region of the second conductivity type formed in an upper portion of the drift region, the second main electrode contact region being positioned facing the first main electrode contact region in the plan view;
- and
- a control electrode arranged over the base region at a position between the first and second main electrode contact regions in the plan view, so as to control a surface potential of the base region underneath, and
- wherein in the plan view, an effective channel width defined by a length of the base region that is directly under the control electrode, as measured along a line perpendicular to a channel current direction, is greater than a width of the second main electrode contact region as measured along a line parallel to said line along which the effective channel width is defined.
A semiconductor integrated circuit, comprising:
- a high-side circuit region;
- a high-voltage junction termination structure formed in a ring shape in an area surrounding the high-side circuit region in a plan view;
- a level shifter formed in a portion of the high-voltage junction termination structure;
- and
- an isolation region that is formed surrounding a periphery of the high-side circuit region and that electrically isolates the high-side circuit region from the level shifter,
- wherein the level shifter includes:
- a base region of a first conductivity type formed in an upper portion of a semiconductor substrate of the first conductivity type, an impurity concentration of the base region being higher than that of the substrate;
- a first main electrode contact region of a second conductivity type formed contacting the base region in an upper portion of the substrate, the second conductivity type being different from the first conductivity type;
- a drift region of the second conductivity type formed contacting the base region in an upper portion of the substrate at a side opposite to a side of the first main electrode contact region in the plan view;
- a second main electrode contact region of the second conductivity type formed in an upper portion of the drift region, the second main electrode contact region being positioned facing the first main electrode contact region in the plan view;
- and
- a control electrode arranged over the base region, at a position between the first and second main electrode contact regions in the plan view, so as to control a surface potential of the base region underneath, and
- wherein in the plan view, an effective channel width defined by a length of the base region that is directly under the control electrode, as measured along a line perpendicular to a channel current direction, is less than a width of the second main electrode contact region as measured along a line parallel to said line along which the effective channel width is defined.
Dependencies are inferred from the claim text.