Variable gain amplifiers for communication systems
AssigneeInphi Corporation
InventorsSimon Forey, Rajasekhar Nagulapalli, Parmanand Mishra
Life of this patent
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Abstract
The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.
Claims20
A variable-gain amplifier device comprising:
- an equalizer section comprising:
- a first input switch coupled to a first input terminal, the first input switch comprising a first intermediate terminal;
- a second input switch coupled to a second input terminal, the second input switch comprising a second intermediate terminal;
- a first common resistor directly coupled to the first intermediate terminal;
- a second common resistor directly coupled to the second intermediate terminal;
- a common node directly coupled to the first common resistor and a second common resistor;
- a digital-to-analog converter (DAC) including a control signal terminal coupled to the common node, the DAC being configured to generate a control signal based on a gain control code;
- and
- an amplifier section comprising:
- a third switch coupled to the first intermediate terminal;
- a fourth switch coupled to the second intermediate terminal;
- a transistor coupled to the third switch and the fourth switch, a resistance of the transistor being based on control signal.
A variable gain amplifier device comprising:
- a first transistor and a second transistor, the first transistor comprising a first gate terminal coupled to a first input signal and a first drain terminal coupled to a first output node, the second transistor comprising a second gate terminal coupled to a second input signal and a second drain terminal coupled to a second output node;
- a first common mode resistor coupled to the first output node;
- a second common mode resistor coupled to the second output node and the first common mode resistor;
- a common node configured between the first common mode resistor and the second common mode resistor, the common node is characterized by a common mode voltage;
- a digital-to-analog converter coupled to the common node;
- a first switch coupled to the first output node;
- a second switch coupled to the second output node;
- and
- a transistor coupled to the third switch and the fourth switch, a resistance of the transistor being based on the common voltage.
A data communication system comprising:
- a data communication interface for receiving a first input signal and a second input signal from a data transmission source via a communication channel, the data communication interface comprising a positive input resistor and a positive input coil, the data communication interface further comprising a negative input resistor and a negative input coil;
- a continuous-time linear equalizer (CTLE) section configured for providing a common mode voltage and a first equalized signal and a second equalized signal based at least on the first input signal and the second input signal, the CTLE section comprising a pair of common mode resistors, the common mode voltage being configured between the pair of common mode resistors;
- and
- a variable gain amplifier (VGA) section comprising a transistor and configured to generate a first amplified signal and a second amplified signal based on the first equalized signal and the second equalized signal, the VGA section being characterized by a gain ratio being at least based on a degeneration resistance value of the transistor, the degeneration resistance value being a function of the common mode voltage and a control signal.
Dependencies are inferred from the claim text.