Driver and slew-rate-control circuit providing soft start after recovery from short

A load switch circuit comprising:

• a supply voltage input;
• a load output;
• a ground plane node;
• a load P-type field effect transistor (PFET) having a load source, a load drain, and a load gate, the load source and the load drain being coupled between the supply voltage input and the load output;
• a driver circuit including a driver N type field effect transistor (NFET) having a driver drain, a driver source, and a driver gate, the driver drain and the driver source being coupled between the supply voltage input and the ground plane node and the driver source being coupled to the load gate;
• a slew-rate-control circuit including:
• a first capacitor node adapted to be coupled to a first terminal of an external capacitor, the first capacitor node being coupled to the driver gate,
• a power down PFET having a power down source, a power down drain, and a power down gate, the power down source and the power down drain being coupled in series with a first current sink between the supply voltage input and the ground plane node, the power down drain being coupled to the driver gate, the power down gate being adapted to receive a power down bar signal,
• a reset PFET having a reset source, a rest reset drain, and a reset gate, the reset source being coupled to the supply voltage input and the reset gate being adapted to receive an over current protection signal, and
• a feedback NFET having a feedback drain, a feedback source, and a feedback gate, the feedback drain being coupled to the reset drain and the feedback source being coupled to the driver gate, the feedback gate being coupled to the load gate.

An integrated circuit comprising:

• a pass transistor coupled between a supply voltage input and a load output, the pass transistor having a control gate;
• a driver circuit having a driver input and having a driver output coupled to the control gate;
• and
• a slew-rate-control circuit having a power down input, and a slew rate output coupled to the driver input, the slew-rate-control circuit including:
• a first capacitor node adapted to be coupled to a first terminal of an external capacitor, the first capacitor node being coupled to the driver input,
• a slew-rate-control element coupled between the driver input and a first source of voltage;
• and
• a reset field-effect transistor (FET) coupled between the driver input and a second source of voltage, the reset FET having an over-current-protection input separate from the power down input.