Bifacial P-type PERC solar cell and module, system, and preparation method thereof

A method of preparing a bifacial P-type PERC solar cell, comprising:

• (1) forming textured surfaces at a front surface and a rear surface of a silicon wafer, the silicon wafer being P-type silicon;
• (2) performing diffusion on the silicon wafer to form an N-type emitter;
• (3) removing phosphosilicate glass on the front surface and peripheral p-n junctions formed during the diffusion;
• (4) depositing an aluminum oxide film on the rear surface of the silicon wafer;
• (5) depositing a silicon nitride film on the rear surface of the silicon wafer;
• (6) depositing a silicon nitride film on the front surface of the silicon wafer;
• (7) performing laser grooving in the rear surface of the silicon wafer to form a first laser grooving region, wherein the first laser grooving region includes a plurality of groups of first laser grooving units, and each group of the first laser grooving units contains one or more first laser grooving bodies;
• (8) printing a rear silver busbar electrode on the rear surface of the silicon wafer;
• (9) printing aluminum paste on the rear surface of the silicon wafer to obtain rear aluminum grid lines, wherein the rear aluminum grid lines are printed on the first laser grooving region with an angle being greater than 10 degrees and smaller than 90 degrees, such that the rear aluminum grid lines are connected to the P-type silicon via the first laser grooving region, wherein the rear silver busbar electrode intersects with the rear aluminum grid lines by a first predetermined angle, the first predetermined angle being greater than 10 degrees and smaller than 90 degrees;
• (10) printing aluminum paste on the rear surface of the silicon wafer along a periphery of the rear aluminum grid lines to obtain an outer aluminum grid frame;
• (11) printing electrode paste on the front surface of the silicon wafer;
• (12) sintering the silicon wafer to form a rear silver electrode and a front silver electrode;
• (13) performing anti-LID annealing on the silicon wafer.