Inverted T channel field effect transistor (ITFET) including a superlattice
AssigneeAtomera Incorporated
InventorRobert John Stephenson
Life of this patent
Estimating the term…
Abstract
A semiconductor device may include a substrate and an inverted T channel on the substrate and including a superlattice. The superlattice may include stacked groups of layers, with each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include source and drain regions on opposing ends of the inverted T channel, and a gate overlying the inverted T channel between the source and drain regions.
Claims21
A semiconductor device comprising:
- a substrate;
- an inverted T channel on the substrate and comprising a superlattice, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
- source and drain regions on opposing ends of the inverted T channel;
- and
- a gate overlying the inverted T channel between the source and drain regions.
A semiconductor device comprising:
- a semiconductor-on-insulator (SOI) substrate;
- an inverted T channel on the SOI substrate and comprising a superlattice, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
- source and drain regions on opposing ends of the inverted T channel;
- and
- a gate overlying the inverted T channel between the source and drain regions and comprising a gate insulator overlying the superlattice channel layer, and a gate electrode overlying the gate insulator.
A semiconductor device comprising:
- a substrate;
- an inverted T channel on the substrate and comprising a superlattice, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
- source and drain regions on opposing ends of the inverted T channel;
- and
- a gate overlying the inverted T channel between the source and drain regions.
Dependencies are inferred from the claim text.