Semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorsYusuke Kobayashi, Naoyuki Ohse
Life of this patent
Estimating the term…
Abstract
A first p+-type region in contact with a bottom of a gate trench is disposed in a striped shape extending along a first direction that is orthogonal to a second direction along which the gate trench extends in a striped shape, as viewed from a front surface of a silicon carbide substrate. As a result, trench gate MOSFETs are disposed in parallel at a predetermined cell pitch along the first direction. A flat SBD is disposed at a predetermined cell pitch along the second direction. The cell pitch of the trench gate MOSFET and the cell pitch of the flat SBD may be set independently of each other.
Claims5
A semiconductor device comprising:
- a semiconductor substrate of a first conductivity type and containing a semiconductor material having a bandgap wider than that of silicon;
- a plurality of trenches provided a predetermined depth from a front surface of the semiconductor substrate, the plurality of trenches being provided at a predetermined pitch along a first direction parallel to the front surface of the semiconductor substrate;
- a gate electrode provided in the trench, via a gate insulating film;
- a first semiconductor region of a second conductivity type provided spanning between adjacent trenches of the plurality of trenches, in a first mesa region between the adjacent trenches;
- a second semiconductor region of the first conductivity type selectively provided in the first semiconductor region;
- a MOS gate structure constituted by the gate insulating film, the gate electrode, the first semiconductor region and the second semiconductor region;
- a conductive layer sandwiched between adjacent trenches of the plurality of trenches and provided on a surface of a second mesa region excluding the first mesa region;
- a Schottky barrier diode configured by a Schottky junction of the conductive layer and the semiconductor substrate;
- a third semiconductor region of the second conductivity type selectively provided in the semiconductor substrate, the third semiconductor region in contact with bottoms of the plurality of trenches;
- a fourth semiconductor region of the second conductivity type selectively provided between the first semiconductor region and the third semiconductor region, the fourth semiconductor region being provided in contact with the first semiconductor region and the third semiconductor region, and separated from the plurality of trenches;
- a first electrode electrically connected to the first semiconductor region, the second semiconductor region, and the conductive layer;
- and
- a second electrode provided at a rear surface of the semiconductor substrate, wherein
- the plurality of trenches are disposed in a striped shape extending along a second direction orthogonal to the first direction and parallel to the front surface of the semiconductor substrate, and
- the third semiconductor region is disposed in a striped shape extending along the first direction.
Dependencies are inferred from the claim text.