Transistor connected diodes and connected III-N devices and their methods of fabrication

A group III-Nitride (III-N) semiconductor structure, comprising:

• a transistor connected diode structure, comprising:
• a group III-nitride (III-N) semiconductor material disposed on a substrate;
• a first raised source structure and a first raised drain structure disposed on the group III-N semiconductor material;
• a mobility enhancement layer disposed on the group III-N semiconductor material, between the first raised source structure and the first raised drain structure;
• a polarization charge inducing layer disposed on the mobility enhancement layer between the first raised source structure and the first raised drain structure, the polarization charge inducing layer having a first portion and a second portion separate by a gap;
• a gate dielectric layer disposed on the mobility enhancement layer in the gap;
• a first metal electrode having a first portion disposed on the raised drain structure,
• a second portion disposed on the gate dielectric layer on the second portion of the polarization charge inducing layer and a third portion disposed on the gate dielectric layer in the gap;
• a second metal electrode disposed on the raised source structure;
• a group III-N transistor structure disposed on the substrate, the group III-N transistor structure comprising:
• a second raised source structure and a second raised drain structure disposed on the group III-N semiconductor material;
• the mobility enhancement layer disposed on the group III-N semiconductor material, between the second raised source structure and the second raised drain structure;
• the polarization charge inducing layer disposed on the mobility enhancement layer between the second raised source structure and the second raised drain structure, the polarization charge inducing layer having a third portion and a fourth portion separated by a second gap;
• the gate dielectric layer disposed on the mobility enhancement layer in the second gap;
• a gate electrode disposed on the dielectric layer above the second gap between the second raised drain structure and the second raised source structure;
• and
• a source contact disposed above the second raised source structure and a drain contact disposed above the second raised drain structure.

A method of fabricating a transistor connected diode structure, the method comprising:

• providing a group III-N semiconductor material on a substrate;
• forming a mobility enhancement layer on the group III-N semiconductor material;
• forming a polarization charge inducing layer on the mobility enhancement layer;
• forming an isolation region in the polarization charge inducing layer;
• forming a first raised source structure and a raised drain structure;
• forming a recess in the polarization charge inducing layer, the recess providing a gap separating a first portion of the polarization charge inducing layer from a second portion of the polarization charge inducing layer;
• forming a gate dielectric layer on the mobility enhancement layer in the gap;
• removing the gate dielectric layer exposing a portion of an uppermost surface of the first raised drain structure;
• forming a first opening in a dielectric layer, the opening exposing the gate dielectric layer over the gap and the portion of the uppermost surface of the first raised drain structure;
• forming an electrode in the first opening;
• forming a second opening, the second opening exposing the raised source structure;
• and
• forming a source contact in the second opening.

A method of fabricating group III-Nitride (III-N) semiconductor structure, the method comprising:

• providing a group III-N semiconductor material on a substrate;
• forming a mobility enhancement layer on the group III-N semiconductor material;
• forming a polarization charge inducing layer on the mobility enhancement layer;
• forming an isolation region in the polarization charge inducing layer, in the mobility enhancement layer and in the group III-N semiconductor material to separate a transistor connected diode region from a group III-N transistor region;
• forming a first raised source structure and a first raised drain structure in the transistor connected diode region and a second raised source structure and a second raised drain structure in the group III-N transistor region;
• forming a first recess and a second recess in the polarization charge inducing layer, the first recess in the transistor connected diode region providing a first gap separating a first portion of the polarization charge inducing layer from a second portion of the polarization charge inducing layer, the second recess in the group III-N transistor region providing a second gap separating a third portion of the polarization charge inducing layer from a fourth portion of the polarization charge inducing layer;
• forming a gate dielectric layer on the mobility enhancement layer in the first gap and in the second gap;
• removing the gate dielectric layer in the transistor connected diode region exposing a portion of an uppermost surface of the first raised drain structure;
• forming a first opening and a second opening in a dielectric layer, the first opening in the transistor connected diode region exposing the gate dielectric layer over the first gap and the exposed portion of uppermost surface of the first raised drain structure, the second opening in the group III-N transistor region exposing the gate dielectric layer over the second gap;
• forming a first electrode in the first opening in the transistor connected diode region and a gate electrode in the second opening in the group III-N transistor region;
• forming a third opening, a fourth opening and a fifth opening in the dielectric layer, the third opening exposing the first raised source structure in the transistor connected diode region, the fourth opening exposing the second raised source structure in the group III-N transistor region and the fifth opening exposing the second raised drain structure in the group III-N transistor region;
• forming a first source contact in the third opening of the transistor connected diode region, a second source contact in the fourth opening of the group III-N transistor region and a drain contact in the fifth opening of the group III-N transistor region.