Power and data routing structures for organic light-emitting diode displays

An organic light-emitting diode display having an array of pixels, comprising:

• a substrate;
• thin-film transistor circuitry on the substrate;
• a pixel definition layer on the thin-film transistor circuitry, wherein the pixel definition layer has openings each of which contains an anode and an organic emissive layer for an organic light-emitting diode and each of which is associated with a respective one of the pixels;
• a cathode layer that covers the array of pixels;
• a plurality of data lines;
• a metal negative power supply path on the substrate, wherein the anodes for the organic light-emitting diodes are formed from a metal layer, wherein an additional portion of the metal layer electrically connects the cathode layer to the metal negative power supply path, and wherein the additional portion of the metal layer covers the plurality of the data lines;
• and
• a metal positive power supply path on the substrate, wherein the metal positive power supply path has a cutout region that is interposed between the plurality of data lines and the additional portion of the metal layer.

An organic light-emitting diode display having an array of pixels, comprising:

• a substrate;
• thin-film transistor circuitry on the substrate;
• a pixel definition layer on the thin-film transistor circuitry, wherein the pixel definition layer has openings each of which contains an anode and an organic emissive layer for an organic light-emitting diode and each of which is associated with a respective one of the pixels;
• a cathode layer that covers the array of pixels;
• a plurality of data lines;
• a metal negative power supply path on the substrate, wherein the anodes for the organic light-emitting diodes are formed from a metal layer, wherein an additional portion of the metal layer electrically connects the cathode layer to the metal negative power supply path, and wherein the additional portion of the metal layer covers the plurality of the data lines;
• and
• a metal positive power supply path on the substrate, wherein a portion of the metal positive power supply path is interposed between the additional portion of the metal layer and the plurality of data lines.