Semiconductor package structure and method for preparing the same
AssigneeNanya Technology Corporation
InventorShing-Yih Shih
Life of this patent
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Abstract
The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate having a front surface and a back surface opposite to the front surface, an interconnection structure disposed over the front surface of the substrate, a first passivation layer disposed over the back surface of the substrate, a second passivation layer disposed over the first passivation layer, and a TSV disposed in the substrate. In some embodiments, the TSV structure penetrates the substrate from the back surface of the substrate to the front surface of the substrate. In some embodiments, the TSV has an end portion protruding from the first passivation layer and separated from the second passivation layer.
Claims11
A semiconductor package structure, comprising:
- a substrate having a front surface and a back surface opposite to the front surface;
- an interconnection structure disposed over the front surface of the substrate;
- a first passivation layer disposed over the back surface of the substrate;
- a second passivation layer disposed over the first passivation layer;
- and
- a through silicon via (TSV) disposed in the substrate;
- and
- a metallic layer disposed over the TSV,
- wherein the TSV penetrates the substrate from the back surface to the front surface, and the TSV has an end portion protruding from the first passivation layer and separated from the second passivation layer;
- wherein the metallic layer covers and contacts a top surface and sidewalls of the end portion of the TSV.
Dependencies are inferred from the claim text.