Method of manufacturing semiconductor apparatus

A method of manufacturing a semiconductor apparatus, comprising the following steps:

• A) forming a semiconductor device element in a Si active layer of an insulating isolation Si substrate including the Si active layer, a buried insulating layer, and a Si supporting substrate arranged in this order;
• B) forming a plurality of through electrode holes penetrating the Si active layer and the buried insulating layer to reach a partial region of the Si supporting substrate in an element region layer including the formed semiconductor device element;
• C) forming a through silicon via by sequentially forming an insulating film, a barrier film, and a Cu film inside the through electrode hole to completely fill the through electrode hole;
• D1) forming a multilayer wiring layer to form a device layer, the multilayer wiring layer including a wiring layer connected to the semiconductor device element on an outer surface of the element region layer in which the through silicon via is formed;
• D2) physically and directly bonding the multilayer wiring layer in the first device layer with a multilayer wiring layer in a second device layer obtained after step D1) using another insulating isolation Si substrate;
• and
• E) exposing the Cu film of the through silicon via by removing the Si supporting substrate after forming the multilayer wiring layer on the outer surface of the element region layer.

A method of manufacturing a semiconductor apparatus, comprising the following steps:

• A) forming a semiconductor device element in a Si active layer of an insulating isolation Si substrate including the Si active layer, a buried insulating layer, and a Si supporting substrate arranged in this order;
• B) forming a plurality of through electrode holes penetrating the Si active layer and the buried insulating layer to reach a partial region of the Si supporting substrate in an element region layer including the formed semiconductor device element;
• C) forming a through silicon via by sequentially forming an insulating film, a barrier film, and a Cu film inside the through electrode hole to completely fill the through electrode hole;
• D1) forming a multilayer wiring layer to form a device layer, the multilayer wiring layer including a wiring layer connected to the semiconductor device element on an outer surface of the element region layer in which the through silicon via is formed;
• D2) physically and directly bonding the multilayer wiring layer in the first device layer with a multilayer wiring layer in a second device layer obtained after step D1) using another insulating isolation Si substrate;
• E) exposing a Cu film of a through silicon via in the second device by removing a Si supporting substrate;
• physically and directly bonding the Cu film of the through silicon via in the second device with a multilayer wiring layer in a third device layer obtained after step D1) using the another insulating isolation Si substrate;
• exposing a Cu film of a through silicon via in the third device by removing a Si supporting substrate;
• and
• physically and directly bonding the Cu film of the through silicon via in the third device with a multilayer wiring layer in a fourth device layer obtained after step D1) using the another insulating isolation Si substrate.