Wafer flatness control using backside compensation structure
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsXiaowang Dai, Zhenyu Lu, Qian Tao, Yushi Hu, Ji Xia, Zhaosong Li, Jialan He
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AssigneeYangtze Memory Technologies Co., Ltd.
InventorsXiaowang Dai, Zhenyu Lu, Qian Tao, Yushi Hu, Ji Xia, Zhaosong Li, Jialan He
Estimating the term…
Embodiments of semiconductor structures for wafer flatness control and methods for using and forming the same are disclosed. In an example, a model indicative of a flatness difference of a wafer between a first direction and a second direction is obtained. The flatness difference is associated with one of a plurality of fabrication stages of a plurality of semiconductor devices on a front side of the wafer. A compensation pattern is determined for reducing the flatness difference based on the model. At the one of the plurality of the fabrication stages, a compensation structure is formed on a backside opposite to the front side of the wafer based on the compensation pattern to reduce the flatness difference.
A method for controlling wafer flatness, comprising:
A method for forming a semiconductor structure, comprising:
A semiconductor structure, comprising:
Dependencies are inferred from the claim text.