US 10,762,934 B2 · Leakage pathway prevention in a memory storage device

Abstract

The present disclosure describes various exemplary memory storage devices that can be programmed to write electronic data into one or more memory cells in a write mode of operation and/or to read the electronic data from the one or more memory cells in a read mode of operation. The various exemplary memory storage devices can select various control lines to read the electronic data from the one or more memory cells onto data lines and/or to write the electronic data from these data lines into the one or more memory cells. In some situations, these data lines are charged, also referred to as pre-charged, to a first logical value, such as a logical one, before the various exemplary memory storage devices write the electronic data into the one or more memory cells. During this pre-charging of these data lines, the various exemplary memory storage devices electrically isolate these data lines from specialized circuitry within these exemplary memory storage devices. This specialized circuitry, also referred to as a write driver, writes the electronic data onto these data lines for storage in the one or more memory cells during the write mode of operation.

Claims20

Dependent claims

A memory storage device, comprising:

a memory cell;
and
a write driver configured to:
form a high-impedance pathway between the write driver and the memory cell to isolate the write driver from the memory cell during a pre-charge phase of a write mode of operation, wherein an output circuit node of the write driver is characterized as being a floating circuit node to form the high-impedance pathway, and wherein the memory storage device is configured to charge a data line between the memory cell and the write driver during the pre-charge phase of the write mode of operation, and
form a low-impedance pathway between the write driver and the memory cell to couple the write driver to the memory cell during a write phase of the write mode of operation, the write driver being further configured to write data to the memory cell during the write phase of the write mode of operation.

2 more elements

A write driver for a memory storage device, the write driver comprising:

write circuitry configured to write data to a memory cell during a write phase of a write mode of operation;
and
isolation circuitry configured to:
isolate the write circuitry from an operational voltage supply during the pre-charge phase of the write mode of operation to form a high-impedance pathway between the write circuitry and the memory cell, wherein an output circuit node of the write circuitry is characterized as being a floating circuit node to form the high-impedance pathway, and wherein the memory storage device is configured to charge a data line between the memory cell and the write driver during the pre-charge phase of the write mode of operation, and
couple the write circuitry to the operational voltage supply during the write phase of the write mode of operation to form a low-impedance pathway between the write circuitry and the memory cell.

2 more elements

Dependencies are inferred from the claim text.

Leakage pathway prevention in a memory storage device

Life of this patent

Leakage pathway prevention in a memory storage device

Life of this patent

Abstract

Claims20