US 10,762,000 B2 · Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory

Abstract

A method of choosing a cache line of a plurality of cache lines of data for eviction from a frontend memory, the method including assigning a baseline replacement score to each way of a plurality of ways of a cache, the ways respectively storing the cache lines, assigning a validity score to each way based on a degree of validity of the cache line stored in each way, assigning an eviction decision score to each way based on a function of the baseline replacement score for the way and the validity score for the way, and choosing a cache line of the way having a highest eviction decision score as the cache line for eviction.

Claims18

Dependent claims

A method of choosing a cache line of a plurality of cache lines of data for eviction from a frontend memory, the method comprising:

assigning a baseline replacement score to each way of a plurality of ways of a cache, the ways respectively storing the cache lines;
assigning a first weighted factor to the baseline replacement score to generate a weighted baseline replacement score;
assigning a validity score to each way based on a degree of validity of the cache line stored in each way;
assigning a second weighted factor to the validity score to generate a weighted validity score;
assigning an eviction decision score to each way based on a function of the weighted baseline replacement score for the way and the weighted validity score for the way;
and
choosing a cache line of the way having a highest eviction decision score as the cache line for eviction.

4 more elements

Dependencies are inferred from the claim text.

Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory

Life of this patent

Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory

Life of this patent

Abstract

Claims18