Preventing hazard flushes in an instruction sequencing unit of a multi-slice processor

A multi-slice processor comprising:

• an instruction sequencing unit, a plurality of execution slices, and a plurality of load/store slices, wherein the multi-slice processor is configured to carry out:
• receiving a load instruction in a load reorder queue, wherein the load instruction is an instruction to load data from a memory location;
• subsequent to receiving the load instruction, receiving a store instruction in a store reorder queue, wherein the store instruction is an instruction to store data in the memory location;
• determining that the store instruction causes a hazard against the load instruction;
• preventing a flush of the load reorder queue based on a state of the load instruction and maintaining the load instruction, wherein the state of the load instruction is a level of completeness of the load instruction, wherein preventing the flush includes setting a prevent critical data forwarding flag in the load reorder queue, and wherein the prevent critical data forwarding flag indicates that no critical data forwarding is to be performed for the associated load instruction;
• and
• re-executing the load instruction, wherein a load-hit-store check is performed on the store reorder queue by determining whether the store instruction is in the store reorder queue and that load instruction has re-executed.

An apparatus comprising:

• a multi-slice processor comprising an instruction sequencing unit, a plurality of execution slices, and a plurality of load/store slices, and memory connected through a bus to the multi-slice processor, wherein the multi-slice processor is configured to carry out:
• receiving a load instruction in a load reorder queue, wherein the load instruction is an instruction to load data from a memory location;
• subsequent to receiving the load instruction, receiving a store instruction in a store reorder queue, wherein the store instruction is an instruction to store data in the memory location;
• determining that the store instruction causes a hazard against the load instruction;
• preventing a flush of the load reorder queue based on a state of the load instruction and maintaining the load instruction, wherein the state of the load instruction is a level of completeness of the load instruction, wherein preventing the flush includes setting a prevent critical data forwarding flag in the load reorder queue, and wherein the prevent critical data forwarding flag indicates that no critical data forwarding is to be performed for the associated load instruction;
• and
• re-executing the load instruction, wherein a load-hit-store check is performed on the store reorder queue by determining whether the store instruction is in the store reorder queue and that load instruction has re-executed.