Systems and methods to predict load data values
AssigneeIntel Corporation
InventorsManjunath Shevgoor, Mark J. Dechene, Stanislav Shwartsman, Pavel I. Kryukov
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsManjunath Shevgoor, Mark J. Dechene, Stanislav Shwartsman, Pavel I. Kryukov
Estimating the term…
Disclosed embodiments relate to predicting load data. In one example, a processor a pipeline having stages ordered as fetch, decode, allocate, write back, and commit, a training table to store an address, predicted data, a state, and a count of instances of unchanged return data, and tracking circuitry to determine, during one or more of the allocate and decode stages, whether a training table entry has a first state and matches a fetched first load instruction, and, if so, using the data predicted by the entry during the execute stage, the tracking circuitry further to update the training table during or after the write back stage to set the state of the first load instruction in the training table to the first state when the count reaches a first threshold.
A processor comprising:
A method comprising:
A non-transitory computer-readable medium containing instructions that, when performed by a processor having a pipeline comprising fetch, allocate, decode, write back, and commit stages, are to cause the processor to respond by:
Dependencies are inferred from the claim text.