Hierarchical memory wear leveling employing a mapped translation layer
AssigneeMicron Technology, Inc.
InventorsSamuel E. Bradshaw, Justin Eno
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsSamuel E. Bradshaw, Justin Eno
Estimating the term…
A method for performing wear leveling in a memory subsystem. The method includes adding, in response to a wear-leveling event, a migration association map entry to a migration association map to control copying of a first set of managed units from a first memory segment to a second set of managed units of a second memory segment, wherein adding the migration association map entry includes setting an exchange pointer of the migration association map entry to a value that references an unused managed unit in the first memory segment and copying the first set of managed units to the second set of managed units beginning with a managed unit in the first set of managed units following the managed unit referenced by the exchange pointer of the first segment metadata table entry.
A method for performing wear leveling in a memory subsystem, the method comprising:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
A system comprising:
Dependencies are inferred from the claim text.