Multi-level wear leveling for non-volatile memory
AssigneeMicron Technology, Inc.
InventorsYing Yu Tai, Ning Chen, Jiangli Zhu
Life of this patent
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Abstract
A memory sub-system performs a first wear leveling operation among a plurality of individual data units of the memory component after a first interval and performs a second wear leveling operation among a first plurality of groups of data units of the memory component after a second interval, wherein a first group of the first plurality of groups comprises the plurality of individual data units. The memory sub-system further performs a third wear leveling operation among a second plurality of groups of data units of the memory component after a third interval, wherein a second group of the second plurality of groups comprises the first plurality of groups of data units.
Claims20
A method comprising:
- performing, by a processing device, a first wear leveling operation among a plurality of individual data units of a memory component after a first interval;
- performing, by the processing device, a second wear leveling operation among a plurality of first-level groups of individual data units in a hierarchy of groups of the memory component after a second interval, wherein at least one first-level group of the plurality of first-level groups comprises the plurality of individual data units;
- and
- performing, by the processing device, a third wear leveling operation among a plurality of second-level groups of data units of the memory component after a third interval, wherein at least one second-level group of the plurality of second-level groups comprises the plurality of first-level groups of individual data units.
A system comprising:
- a memory component;
- and
- a processing device, operatively coupled with the memory component, to:
- perform a first wear leveling operation among a plurality of individual data units of the memory component after a first interval;
- perform a second wear leveling operation among a plurality of first-level groups of individual data units in a hierarchy of groups of the memory component after a second interval, wherein at least one first-level group of the plurality of first-level groups comprises the plurality of individual data units;
- and
- perform a third wear leveling operation among a plurality of second-level groups of data units of the memory component after a third interval, wherein at least one second-level group of the plurality of second-level groups comprises the first plurality of first-level groups of individual data units.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to:
- detect an occurrence of a first trigger;
- redistribute a plurality of individual data units to different physical locations on a memory component in response to the occurrence of the first trigger;
- detect an occurrence of a second trigger;
- redistribute a plurality of first-level groups of individual data units in a hierarchy of groups to different physical locations on the memory component in response to the occurrence of the second trigger, wherein at least one first-level group of the plurality of first-level groups comprises the plurality of individual data units;
- detect an occurrence of a third trigger;
- and
- redistribute a plurality of second-level groups of data units to different physical locations on the memory component in response to the occurrence of the third trigger, wherein at least one second-level group of the plurality of second-level groups comprises the plurality of first-level groups of individual data units.
Dependencies are inferred from the claim text.