Memory controller and method of operating the same
AssigneeSK hynix Inc.
InventorsSung Kwan Hong, Yeong Sik Yi
Life of this patent
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Abstract
Provided herein may be a memory controller and a method of operating the same. The memory controller may include a command processor configured to generate a flush command in response to a flush request input from an external host and to assign a slot number corresponding to the flush command; a sequence generator configured to determine flush data to be stored in response to the flush command, and to generate a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices; and a memory operation controller configured to control the plurality of memory devices to store the flush data in the plurality of memory devices.
Claims16
A memory controller for controlling a plurality of memory devices, comprising:
- a command processor configured to generate a flush command in response to a flush request input from an external host and to assign a slot number corresponding to the flush command;
- a sequence generator configured to determine flush data, which is data to be stored in response to the flush command, among pieces of write data stored in a write cache buffer, and to generate a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices;
- and
- a memory operation controller configured to control the plurality of memory devices so that program operations of storing the flush data in the plurality of memory devices are performed depending on the write sequence, and to provide the slot number corresponding to the flush command to the command processor.
The memory controller according to claim wherein the command processor is configured to store data corresponding to an input write request in the write cache buffer while the program operations are being performed.
A method of operating a memory controller for controlling a plurality of memory devices, the method comprising:
- generating a flush command in response to a flush request received from an external host and assigning a slot number to the flush command;
- determining flush data that is data to be stored in the plurality of memory devices in response to the flush command;
- generating a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices;
- and
- controlling the plurality of memory devices so that program operations of storing the flush data in the plurality of memory devices are performed depending on the write sequence.
An operating method of a memory system, the method comprising:
- buffering, in response to one or more requests, one or more commands respectively having a command sequence;
- buffering write data;
- identifying, in response to a flush request, as flush data the buffered write data corresponding to one or more buffered write commands before in the command sequence a buffered flush command corresponding to the flush request;
- selecting one or more among a plurality of memory devices based on a size of the flush data, the memory devices having a device sequence;
- and
- controlling the selected memory devices to perform a flush operation with the flush data according to the device sequence in response to the buffered flush command.
Dependencies are inferred from the claim text.