Techniques to enable communication between a processor and voltage regulator

A system comprising:

• a voltage regulator to provide at least one voltage to a processor;
• an interface to couple the voltage regulator to the processor;
• and
• the processor comprising a multi-chip package comprising a first die having at least a first core, a second die having at least a second core, a first storage to store parameter information for the voltage regulator, and a power controller to control power consumption of the processor, wherein the power controller is to determine a performance state for the first core and generate a message for communication to the voltage regulator having an address of the voltage regulator and an offset to a location within the voltage regulator in which voltage information is to be stored based at least in part on the parameter information, wherein in response to the message the voltage regulator is to output a voltage to enable the first core to operate at the performance state.