Solder mask void regions for printed circuit boards
AssigneeHewlett Packard Enterprise Development LP
InventorsDavid W. Engler, Stephen F. Contreras
Life of this patent
Estimating the term…
Abstract
A printed circuit board having a substrate layer, at least one electrically conductive trace disposed on the substrate layer, and a solder mask layer disposed over the substrate layer and the electrically conductive trace, wherein the solder mask later includes a void region over at least a portion of the electrically conductive trace. Also, a method of optimizing printed circuit board designing including selecting printed circuit board data comprising at least a solder mask layer area, varying the solder mask layer area, determining an insertion loss value for each varied solder mask layer area, comparing the insertion loss values for each varied solder mask layer area, and selecting a solder mask layer area based on the comparing.
Claims6
A printed circuit board comprising:
- a substrate layer;
- at least one electrically conductive trace disposed on the substrate layer;
- and
- a solder mask layer disposed over the substrate layer and the electrically conductive trace, wherein the solder mask layer includes one or more void regions and one or more solder mask regions over at least a portion of the electrically conductive trace, and the ratio of the total length of the one or more void regions to the total length of the one or more solder mask regions over at least the portion of the electrically conductive trace is greater than or equal to 10:1.
Dependencies are inferred from the claim text.