Demodulator for pulse-width modulated clock signals

A system for synchronizing clock signals between a plurality of circuits, comprising:

• a reference clock generator configured to generate a reference clock;
• a plurality of circuits, each circuit comprising a demodulation circuit, each demodulation circuit comprising:
• an edge detector configured to detect transitions in the reference clock and output a signal in response to a detected transition;
• a modulation detection circuit configured to identify at least one pulse-width modulated pulse that is different from a plurality of pulses of the reference clock based at least in part on the signal;
• and
• a retiming circuit configured to output a clock signal synchronized with a synchronization transition in the reference clock, wherein the synchronization transition corresponds to the identified at least one pulse-width modulated pulse.

A method of demodulating a reference clock, comprising:

• detecting transitions in a reference clock and outputting a signal in response to a detected transition;
• identifying at least one pulse-width modulated pulse that is different from a plurality of pulses of the reference clock based at least in part on the signal;
• and
• outputting a clock signal synchronized with a synchronization transition in the reference clock, wherein the synchronization transition corresponds to the identified at least one pulse-width modulated pulse.