Amplifier circuit, reception circuit, and semiconductor integrated circuit

A reception circuit, comprising:

• an amplifier circuit configured to amplify an input serial signal;
• a comparator configured to sample the input serial signal amplified by the amplifier circuit;
• and
• a demultiplexer circuit configured to perform a serial-parallel conversion on an output of the comparator and outputs a parallel signal, wherein
• the amplifier circuit includes:
• an input circuit configured to receive the input serial signal;
• a load circuit that is provided in series with the input circuit between a first power supply line and a second power supply line and includes a first variable resistance unit and a second variable resistance unit, a resistance value of the first variable resistance unit being controlled by a digital code, a resistance value of the second variable resistance unit being controlled by an analog control voltage;
• and
• a correction circuit that is provided between the first power supply line and the second power supply line, and includes a third variable resistance unit having a circuit configuration corresponding to the first variable resistance unit and a fourth variable resistance unit having a circuit configuration corresponding to the second variable resistance unit, a resistance value of the third variable resistance unit being controlled by the digital code, a resistance value of the fourth variable resistance unit being controlled by the analog control voltage, the correction circuit being configured to correct a resistance value of the load circuit.

A semiconductor integrated circuit, comprising:

• an amplifier circuit configured to amplify an input serial signal;
• a comparator configured to sample the input serial signal amplified by the amplifier circuit;
• a demultiplexer circuit configured to perform a serial-parallel conversion on an output of the comparator and outputs a parallel signal;
• and
• an internal circuit configured to perform a processing operation by receiving the parallel signal from the demultiplexer circuit, wherein
• the amplifier circuit includes:
• an input circuit configured to receive the input serial signal;
• a load circuit that is provided in series with the input circuit between a first power supply line and a second power supply line and includes a first variable resistance unit and a second variable resistance unit, a resistance value of the first variable resistance unit being controlled by a digital code, a resistance value of the second variable resistance unit being controlled by an analog control voltage;
• and
• a correction circuit that is provided between the first power supply line and the second power supply line, and includes a third variable resistance unit having a circuit configuration corresponding to the first variable resistance unit and a fourth variable resistance unit having a circuit configuration corresponding to the second variable resistance unit, a resistance value of the third variable resistance unit being controlled by the digital code, a resistance value of the fourth variable resistance unit being controlled by the analog control voltage, the correction circuit being configured to correct a resistance value of the load circuit.