System and method for dynamic buffer sizing in a computing device

A computer system for dynamically controlling buffer size in a computing device in a portable computing device (“PCD”), the system comprising:

• a plurality of components of a system on a chip (“SoC”) of the PCD, the PCD being powered by a battery and comprising a hand-held device;
• a plurality of buffers on the SoC, each of the plurality of buffers associated with one of the plurality of components;
• and
• a monitor module of the SoC, the monitor module configured to:
• determine a first use case for the PCD, the plurality of components of the SoC collectively being operable in the first use case, each of the plurality of components having a first activity level in the first use case,
• set each of the plurality of buffers to a non-zero first buffer size based on the first use case, the first buffer size for each of the buffers based on the first activity level and power consumption of the associated component of the SoC, a depth of at least one buffer for the first buffer size is decreased by turning off power or by gating a portion of the at least one buffer based on reduced activity and reduced power consumption of an associated component during the first activity level;
• determine a second use case for the PCD different from the first use case, the plurality of components of the SoC collectively being operable in the second use case, each of the plurality of components having a second activity level in the second use case, set each of the plurality of buffers to a non-zero second buffer size based on the second use case, wherein the second buffer size for each buffer is based on the second activity level and reduced power consumption of the associated component of the SoC, the second buffer size different from the first buffer size;
• a depth of at least one buffer for the second buffer size is decreased by turning off power or by gating a portion of the at least one buffer based on reduced activity and power consumption of an associated component during the second activity level, such that decreased depth of buffers during the first and second use cases reduces overall power consumption of the PCD and improves life of the battery.

A computer system for dynamically controlling buffer size in a computing device in a portable computing device (“PCD”), the system comprising:

• means for determining with a monitor module of a system on a chip (“SoC”) a first use case for the PCD, a plurality of components of the SoC collectively being operable in the first use case, each of the plurality of components having a first activity level in the first use case, the PCD being powered by a battery and comprising a hand-held device;
• means for setting each of a plurality of buffers to a non-zero first buffer size based on the first use case, wherein
• each of the plurality of buffers is associated one of the plurality of components of the SoC,
• the first buffer size for each of the buffers is based on the first activity level and power consumption of the associated component of the SoC;
• a depth of at least one buffer for the first buffer size is decreased by turning off power or by gating a portion of the at least one buffer based on reduced activity and reduced power consumption of an associated component during the first activity level;
• means for determining with the monitor module a second use case for the PCD different from the first use case, the plurality of components of the SoC collectively being operable in the second use case, each of the plurality of components having a second activity level in the second use case;
• and
• means for setting each of the plurality of buffers to a non-zero second buffer size based on the second use case, wherein the second buffer size for each buffer is based on the second activity level and power consumption of the associated component of the SoC, the second buffer size different from the first buffer size;
• a depth of at least one buffer for the second buffer size is decreased by turning off power or by gating a portion of the at least one buffer based on reduced activity and reduced power consumption of an associated component during the second activity level, such that decreased depth of buffers during the first and second use cases reduces overall power consumption of the PCD and improves life of the battery.

A computer program product comprising a non-transitory computer usable medium having a computer readable program code embodied therein, said computer readable program code adapted to be executed to implement a method for dynamically controlling buffer size in a computing device in a portable computing device (“PCD”), the method comprising:

• determining with a monitor module of a system on a chip (“SoC”) a first use case for the PCD, a plurality of components of the SoC collectively being operable in the first use case, each of the plurality of components having a first activity level in the first use case, the PCD being powered by a battery and comprising a hand-held device;
• setting each of a plurality of buffers to a non-zero first buffer size based on the first use case, wherein
• each of the plurality of buffers is associated one of the plurality of components of the SoC,
• the first buffer size for each of the buffers is based on the first activity level and power consumption of the associated component of the SoC;
• a depth of at least one buffer for the first buffer size is decreased by turning off power or by gating a portion of the at least one buffer based on reduced activity and power consumption of an associated component during the first activity level;
• determining with the monitor module a second use case for the PCD different from the first use case, the plurality of components of the SoC collectively being operable in the second use case, each of the plurality of components having a second activity level in the second use case;
• and
• setting each of the plurality of buffers to a non-zero second buffer size based on the second use case, wherein the second buffer size for each buffer is based on the second activity level and power consumption of the associated component of the SoC, the second buffer size different from the first buffer size;
• a depth of at least one buffer for the second buffer size is decreased by turning off power or by gating a portion of the at least one buffer based on reduced activity and power consumption of an associated component during the second activity level, such that decreased depth of buffers during the first and second use cases reduces overall power consumption of the PCD and improves life of the battery.