Supply voltage adaptation via decision feedback equalizer
AssigneeIntel Corporation
InventorsShenggao Li, Ji Chen
Life of this patent
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Abstract
Some embodiments include apparatus and methods using a first latch in a decision feedback equalizer (DFE), a second latch in the DFE, and circuitry coupled to the first and second latches. The second latch includes a first input node coupled to an output node of the first latch. The circuitry includes a first input node coupled to the first output node, a second input node coupled to a second output node of the second latch, and an output node to provide information having a first output value based on first values of information at the first and second output nodes and a second output value based on second values of information at the first and second output nodes.
Claims17
An apparatus comprising:
- a first latch in a decision feedback equalizer (DFE);
- a second latch in the DFE, the second latch including an input node coupled to a first output node of the first latch;
- circuitry including a first input node coupled to the first output node of the first latch, a second input node coupled to a second output node of the second latch, and an output node to provide information having a first output value based on first values of information at the first and second output nodes and a second output value based on second values of information at the first and second output nodes;
- a control unit coupled to the circuitry and configured to change a supply voltage of a supply node of the DFE according to the information at the output node of the circuitry;
- and
- a frequency divider circuit in the DFE, wherein the input of the frequency divider is coupled to multiple data samplers and the output of the frequency divider is coupled to an input node of the first latch.
An apparatus comprising:
- a voltage generator circuit;
- a control unit;
- and
- a receiver lane coupled to the voltage generator circuit and the control unit, the receiver lane including:
- an input circuit;
- and
- a decision feedback equalizer (DFE), the DFE including:
- a first latch including a first latch output node;
- a second latch including a second latch input node and a second latch output node, the second latch input node coupled to the first latch output node;
- circuitry including a first input node coupled to the first latch output node, a second input node coupled to the second latch output node, and an output node to provide information having a first output value based on first values of information at the first latch and second latch output nodes and a second output value based on second values of information at the first latch and second latch output nodes, wherein the control unit is configured to change a supply voltage of the voltage generator circuit according to the information at the output node of the circuitry;
- and
- a frequency divider circuit in the DFE and multiple data samplers, wherein the input of the frequency divider is coupled to the multiple data samplers and the output of the frequency divider is coupled to an input node of the first latch.
An integrated comprising:
- multiple receiver lanes, each receiver lane including:
- an input circuit;
- a decision feedback equalizer (DFE);
- and
- a detection circuit;
- the DFE including:
- a first latch including a first latch output node;
- a second latch including a second latch input node and a second latch output node, the second latch input node coupled to the first latch output node;
- and
- circuitry of the detection circuit including a first input node coupled to the first latch output node, a second input node coupled to the second latch output node, and an output node to provide information having a first output value based on first values of information at the first latch output node and the second latch output node, and a second output value based on second values of information at the first latch output node and the second latch output node;
- and
- a control unit coupled to the receiver lanes and configured to change a supply voltage of a receiver lane according to the information at the output node of the circuitry of the detection circuit of the receiver lane, wherein each DFE includes a portion configured to operate as a frequency divider, wherein the value of the information generated by the detection circuit is based on an operation of the frequency divider.
Dependencies are inferred from the claim text.