Transition state acquisition device, time-to-digital converter, and A/D conversion circuit
AssigneeSeiko Epson Corporation
InventorMasayoshi Todorokihara
Life of this patent
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Abstract
A transition state acquisition device includes an oscillator that includes a tapped delay line and a combination circuit provided on a signal path from one end to the other end of the tapped delay line, and oscillates based on a first signal, and a latch that captures and holds an output signal of the tapped delay line in synchronization with a second signal. The oscillator starts a transition of a state of the tapped delay line based on the first signal. An interval between timings at which the latch captures the output signals of the tapped delay line is shorter than a time during which the state transition of the tapped delay line makes one round.
Claims11
A transition state acquisition device comprising:
- an oscillator that includes a tapped delay line and a combination circuit provided on a signal path from one end to the other end of the tapped delay line, and oscillates based on a first signal;
- and
- a latch that captures and holds an output signal of the tapped delay line in synchronization with a second signal,
- wherein the oscillator starts a transition of a state of the tapped delay line based on the first signal, and
- wherein an interval between timings at which the latch captures the output signals of the tapped delay line is shorter than a time during which the state transition of the tapped delay line makes one round.
Dependencies are inferred from the claim text.