Method and apparatus for analog/digital conversion
AssigneeInfineon Technologies AG
InventorsMartin Pernull, Peter Bogner
Life of this patent
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Abstract
A method and an apparatus for determining the suitability of a test delay value between comparator decisions of a comparator circuit of an asynchronous successive approximation analog/digital converter and a method for determining an optimized delay value of a comparator of an asynchronous successive approximation analog/digital converter are provided.
Claims20
A method for determining a suitability of a test delay value between comparator decisions of a comparator circuit of an asynchronous successive approximation analog/digital converter, wherein the asynchronous successive approximation analog/digital converter comprises a digital/analog converter, the method comprising:
- providing the test delay value;
- converting a predetermined digital test value into an analog test signal using the digital/analog converter;
- approximating the analog test signal in a bit-by-bit manner using the asynchronous successive approximation analog/digital converter, and generating a digital test result based on the approximating;
- and
- determining whether the test delay value is a suitable delay value for operating the asynchronous successive approximation analog/digital converter, determining comprising comparing the digital test result with the predetermined digital test value.
A method for determining an optimized delay value of a comparator circuit of an asynchronous successive approximation analog/digital converter comprising a digital/analog converter and the comparator circuit, the method comprising:
- determining a suitability of at least two test delay values between comparator decisions of the comparator circuit of the asynchronous successive approximation analog/digital converter, wherein for each of the at least two test delay values, determining the suitability comprises performing the following steps to produce at least two corresponding digital test results:
- providing a respective test delay value of the at least two test delay values;
- converting a predetermined digital test value into an analog test signal using the digital/analog converter,
- approximating the analog test signal in a bit-by-bit manner using the asynchronous successive approximation analog/digital converter, and generating a corresponding digital test result of the at least two corresponding digital test results based on the approximating,
- determining whether the respective test delay value is a suitable delay value for operating the asynchronous successive approximation analog/digital converter, determining comprising comparing the corresponding digital test result with the predetermined digital test value;
- and
- determining the optimized delay value comprising comparing the at least two corresponding digital test results.
An apparatus for successive approximation analog/digital conversion, the apparatus comprising:
- a digital/analog converter;
- an asynchronous approximation register;
- a delay circuit;
- and
- a time calibration circuit, wherein the time calibration circuit is configured to:
- provide a test delay value,
- convert a predetermined digital test value into an analog test signal using the digital/analog converter,
- approximate the analog test signal in a bit-by-bit manner using digital/analog converter and the asynchronous approximation register, and generating a digital test result based on the approximating, and
- determine whether the test delay value is a suitable delay value for performing the successive approximation analog/digital conversion, determining comprising comparing the digital test result with the predetermined digital test value.
An apparatus for analog/digital conversion, the apparatus comprising:
- an asynchronous successive approximation analog/digital converter comprising:
- a digital/analog converter,
- an approximation register,
- a comparator circuit,
- an adjustable delay circuit configured to stipulate a delay between decisions of the comparator circuit, and
- a time calibration circuit;
- wherein the asynchronous successive approximation analog/digital converter is configured to:
- receive a predetermined digital test value and to convert the predetermined digital test value into an analog test signal using the digital/analog converter, and
- approximate the analog test signal in a bit-by-bit manner on based on a multiplicity of comparator decisions to provide a digital test result;
- and
- wherein the time calibration circuit is configured to compare the digital test result with the predetermined digital test value and to determine a suitability of at least one test delay value based on comparing the predetermined digital test value with the digital test result.
Dependencies are inferred from the claim text.