Asynchronous successive approximation analog-to-digital converter and related methods and apparatus
AssigneeButterfly Network, Inc.
InventorsKailiang Chen, Tyler S. Ralston
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Abstract
An ultrasound device including an asynchronous successive approximation analog-to-digital converter and method are provided. The device includes at least one ultrasonic transducer, a plurality of asynchronous successive-approximation-register (SAR) analog-to-digital converters (ADC) coupled to the at least one ultrasonic transducer, at least one asynchronous SAR in the plurality having a sample and hold stage, a digital-to-analog converter (DAC), a comparator, and control circuitry, wherein a DAC update event following at least one bit conversion is synchronized to a corresponding DAC update event of at least one other ADC in the plurality of ADCs.
Claims12
An apparatus, comprising:
- at least one ultrasonic transducer;
- a plurality of asynchronous successive-approximation-register (SAR) analog-to-digital converters (ADCs) coupled to the at least one ultrasonic transducer, at least one asynchronous SAR ADC in the plurality having a sample and hold stage, a digital-to-analog converter (DAC), a comparator, and control circuitry,
- wherein a DAC update event of the at least one SAR ADC following at least one bit conversion is synchronized to a corresponding DAC update event of at least one other SAR ADC in the plurality of SAR ADCs, and
- wherein conversion of a next bit of the at least one SAR ADC after the at least one bit conversion is triggered by the DAC update event.
A method of operating an ultrasound device having a plurality of ultrasonic transducers and a plurality of asynchronous successive-approximation-register (SAR) analog-to-digital converters (ADCs), each ultrasonic transducer being respectively coupled to a SAR ADC, each asynchronous SAR ADC in the plurality having a sample and hold stage, a digital-to-analog converter (DAC), a comparator, and control circuitry, the method comprising:
- converting, in response to a first clock signal, a first bit of one SAR ADC in the plurality of SAR ADCs;
- updating a DAC in the one SAR ADC in response to the converting;
- and
- updating a DAC in another SAR ADC in the plurality of SAR ADCs in response to the updating a DAC in the one SAR ADC.
Dependencies are inferred from the claim text.