Reconfigurable programmable integrated circuit with on-chip network

A programmable integrated circuit, comprising:

• a plurality of clusters disposed on a plurality of cluster rows and a plurality of cluster columns, each cluster comprising programmable logic;
• an internal network on chip (iNOC) comprising iNOC rows and iNOC columns;
• and
• an external network on chip (eNOC) connected to the iNOC rows and the iNOC columns, wherein each cluster includes, for each direction of iNOC row traffic, a router and a network access point (NAP) that connects to user logic in the cluster, wherein each router is configured for supporting one or more local addresses, wherein multicast to two or more routers on one of the iNOC rows is implemented by assigning a same multicast addresses to be a local address for the two or more routers on the iNOC row.

A programmable integrated circuit, comprising:

• a plurality of clusters disposed on a plurality of cluster rows and a plurality of cluster columns, each cluster comprising programmable logic;
• an internal network on chip (iNOC) comprising iNOC rows and iNOC columns;
• and
• an external network on chip (eNOC) connected to the iNOC rows and the iNOC columns, wherein each cluster includes, for each direction of iNOC row traffic, a router and a network access point (NAP) that connects to user logic in the cluster, wherein each router is configured to interleave flits incoming from other routers with flits transmitted from the programmable hardware logic in the plurality of clusters, wherein each router is configured to interleave flits at the router based on a pseudorandom number and a threshold associated with the pseudorandom number to select between one flit incoming from other routers and one flit transmitted from the programmable hardware logic in the plurality of clusters.

A method comprising:

• receiving, by a field programmable gate array Control Unit (FCU) in a programmable integrated circuit, a first configuration for configuring the programmable integrated circuit, the programmable integrated circuit further comprising:
• a plurality of clusters disposed on a plurality of cluster rows and a plurality of cluster columns, each cluster comprising programmable hardware logic;
• an internal network on chip (iNOC) comprising iNOC rows and iNOC columns;
• and
• an external network on chip (eNOC) directly connected to the iNOC rows and the iNOC columns, the FCU being directly connected to the eNOC, wherein the FCU communicates with the plurality of clusters via the iNOC and the eNOC;
• configuring the programmable integrated circuit with the first configuration;
• receiving, by the FCU, a second configuration from the programmable hardware logic in the plurality of clusters;
• and
• reconfiguring a component of the programmable integrated circuit based on the second configuration.

A method comprising:

• configuring a programmable integrated circuit that comprises:
• a plurality of clusters disposed on a plurality of cluster rows and a plurality of cluster columns, each cluster comprising programmable hardware logic;
• an internal network on chip (iNOC) comprising iNOC rows and iNOC columns;
• and
• an external network on chip (eNOC) connected to the iNOC rows and the iNOC columns, wherein each cluster includes, for each direction of iNOC row traffic, a router and a network access point (NAP) that connects to user logic in the cluster, wherein each router is configured for supporting one or more local addresses;
• implementing broadcast to routers on one of the iNOC rows by assigning a same broadcast addresses to be a local address for the routers on the iNOC row;
• and
• implementing multicast to two or more routers on one of the iNOC rows by assigning a same multicast addresses to be a local address for the two or more routers on the iNOC row.

A non-transitory machine-readable storage medium including instructions that, when executed by a machine, cause the machine to perform operations comprising:

• receiving, by a field programmable gate array Control Unit (FCU) in a programmable integrated circuit, a first configuration for configuring the programmable integrated circuit, the programmable integrated circuit further comprising:
• a plurality of clusters disposed on a plurality of cluster rows and a plurality of cluster columns, each cluster comprising programmable hardware logic;
• an internal network on chip (iNOC) comprising iNOC rows and iNOC columns;
• and
• an external network on chip (eNOC) directly connected to the iNOC rows and the iNOC columns, the FCU being directly connected to the eNOC, wherein the FCU communicates with the plurality of clusters via the iNOC and the eNOC;
• configuring the programmable integrated circuit with the first configuration;
• receiving, by the FCU, a second configuration from the programmable hardware logic in the plurality of clusters;
• and
• reconfiguring a component of the programmable integrated circuit based on the second configuration.