Capacitive level shifter
AssigneeSilicon Laboratories Inc.
InventorMohammad Al-Shyoukh
Life of this patent
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Abstract
A level shifter includes a flying capacitor having a first plate and a second plate. The level shifter includes a circuit coupled to the first plate and coupled to the second plate. The circuit is configured to receive a received signal having a logic state using a first voltage domain and configured to generate a symmetrical output signal having the logic state using a second voltage domain based on charge stored by the flying capacitor. The level shifter has a propagation delay from the received signal to the symmetrical output signal of less than one nanosecond with negligible duty cycle distortion.
Claims20
A capacitive level shifter comprising:
- a first power supply node;
- a second power supply node;
- a third power supply node;
- an input node;
- an output node;
- an input circuit coupled between the second power supply node and the third power supply node and including complementary versions of the input node;
- a differential amplifier coupled between a differential pair of nodes, the third power supply node, and the complementary versions of the input node;
- a load circuit coupled between the first power supply node and the differential pair of nodes;
- a capacitor having a first plate and a second plate, wherein the first plate is coupled to a first node of the differential pair of nodes and the second plate is coupled to a second node of the complementary versions of the input node;
- and
- an output circuit coupled between the first power supply node and the third power supply node and configured to generate an output signal on the output node based on a first voltage on the first plate and a second voltage on the second plate.
A method for level-shifting a received signal from a first voltage domain to a second voltage domain, the method comprising:
- establishing charge on plates of a capacitor consistent with a logic level of an input signal received by a circuit in the first voltage domain;
- maintaining the charge on the plates of the capacitor consistent with the logic level using a second circuit in the second voltage domain;
- and
- generating an output signal in the second voltage domain according to the logic level using the charge on the plates of the capacitor.
A level shifter comprising:
- a flying capacitor having a first plate and a second plate;
- and
- a circuit coupled to the first plate and coupled to the second plate, the circuit being configured to receive a received signal having a logic state using a first voltage domain and configured to generate a symmetrical output signal having the logic state using a second voltage domain based on charge stored by the flying capacitor,
- wherein the level shifter has a propagation delay from the received signal to the symmetrical output signal of less than one nanosecond with negligible duty cycle distortion.
Dependencies are inferred from the claim text.