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US 10,707,854 B2Granted
Clock screening with programmable counter-based clock interface and time-to-digital converter with high resolution and wide range operation
AssigneeQUALCOMM Incorporated
InventorsZhengzheng Wu, Deping Huang, Jeffrey Mark Hinrichs, Marzio Pedrali-Noy
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Abstract
A sub-ranging time-to-digital converter (TDC) is disclosed that includes two ring oscillators for determining a time difference between two clock edges.
Claims17
A time-to-digital converter for measuring a time between a first clock edge and a second clock edge, comprising:
- a slow oscillator configured to oscillate a slow oscillator output signal responsive to the first clock edge;
- a coarse counter configured to count a coarse count responsive to cycles of the slow oscillator output signal;
- a fast oscillator configured to oscillate a fast oscillator output signal responsive to the second clock edge, wherein the fast oscillator is a first ring oscillator, and wherein the slow oscillator is a second ring oscillator;
- a fine counter configured to count a fine count responsive to cycles of the fast oscillator output signal, wherein a frequency for the fast oscillator output signal is greater than a frequency for the slow oscillator output signal;
- a first current source coupled to an input of the slow oscillator and configured to selectively sink a first current;
- and
- a second current source coupled to an input of the fast oscillator and configured to selectively sink a second current.
4 more elements
A method, comprising:
- sinking a first current through a first current source prior to a first clock edge;
- shutting off the first current source responsive to the first clock edge;
- oscillating a slow oscillator output signal responsive to the first clock edge;
- sinking a second current through a second current source prior to a second clock edge following the first clock edge;
- shutting off the second current source responsive to the second clock edge;
- oscillating a fast oscillator output signal responsive to the second clock edge, wherein a frequency for the fast oscillator output signal is greater than a frequency for the slow oscillator output signal;
- counting cycles of the slow oscillator output signal to count a coarse count;
- counting cycles of the fast oscillator output signal to count a fine count;
- and
- measuring a delay between first clock edge and the second clock edge responsive to a function of the coarse count and the fine count to form a measurement of the delay.
7 more elements
Dependencies are inferred from the claim text.