High efficiency switching power amplifier

A method comprising:

• operating an amplifier in a first mode, wherein the amplifier includes:
• a plurality of transistors coupled in series between a power node and a ground node, the plurality of transistors including a first transistor having a respective source terminal coupled to the power node, a second transistor having a respective source terminal coupled to the ground node, and a subset of transistors coupled in series between the first and second transistors;
• wherein operating the amplifier in the first mode comprises the first and second transistors acting as data switching circuits and the subset of transistors acting as cascode transistors;
• and
• operating the amplifier in a second mode, wherein operating in the second mode comprises the subset of transistors acting as switching circuits.

The method as recited in 11, further comprising:

• decoding circuitry providing control signals to each of the plurality of driver circuits;
• enabling, based on the control signals, correspondingly coupled ones of the plurality of driver circuits to convey data to the first and second transistors when operating in the first mode;
• and
• causing, based on the control signals, correspondingly coupled ones of the plurality of driver circuits to convey a respective fixed voltage to a respective gate terminal of each of the transistors of the subset of transistors when operating in the first mode.

A system comprising:

• a modulation circuit configured to provide digital data on a first signal path, and a first set of control signals on a second signal path;
• and
• a power amplifier coupled to receive the digital data via the first signal path and the control signal via the second signal path, wherein the power amplifier includes:
• a plurality of transistors coupled in series between a power node and a ground node, the plurality of transistors including:
• a first transistor having a respective source terminal coupled to the power node;
• a second transistor having a respective source terminal coupled to the ground node;
• and
• a subset of transistors coupled in series between the first and second transistors;
• wherein the modulation circuit is configured to provide control signals to cause the power amplifier to operate in a first mode, wherein during operation in the first mode, the first and second transistors act as data switching circuits and the subset of transistors act as cascode transistors;
• and
• wherein the modulation circuit is further configured to provide control signals to cause the power amplifier to operate in a second mode, wherein during operation in the second mode the subset of transistors act as data switching circuits, the first transistor is held inactive, and the second transistor is held active.