Back to results
US 10,707,749 B2Granted
Charge pump, and high voltage generator and flash memory device having the same
AssigneeSamsung Electronics Co., Ltd.
InventorHo Young Shin
Life of this patent
Estimating the term…
Abstract
A charge pump includes a first pumping capacitor configured to pump a first voltage of a first node, in response to a first clock signal, a gate pumping capacitor configured to pump a second voltage of a second node, in response to a second clock signal, a charge transfer transistor including a first source connected to a first one of a third node and the first node, a first gate connected to the second node, and a first drain connected to a remaining one of the first node and the third node, a gate control transistor including a second source connected to the first one of the third node and the first node, a second gate connected to the remaining one of the first node and the third node, and a second drain connected to the second node, and a gate discharge or charge unit.
Claims16
A charge pump comprising:
- a first pumping capacitor configured to pump a first voltage of a first node, in response to a first clock signal;
- a gate pumping capacitor configured to pump a second voltage of a second node, in response to a second clock signal;
- a charge transfer transistor comprising a first source connected to a first one of a third node and the first node, a first gate connected to the second node, a first drain connected to a remaining one of the first node and the third node, and a first body connected to a fourth node;
- a gate control transistor comprising a second source connected to the first one of the third node and the first node, a second gate connected to the remaining one of the first node and the third node, a second drain connected to the second node, and a second body connected to the fourth node;
- a gate discharge or charge unit configured to discharge or charge a charge of the second node, and comprising at least one gate discharge or charge transistor comprising a third gate and a third source that are connected to the second node, a third drain connected to the remaining one of the first node and the third node, and a third body connected to the fourth node;
- and
- a first body control transistor comprising a fourth source connected to the first one of the third node or the first node, a fourth gate connected to the remaining one of the first node or the third node, and a fourth drain and a fourth body that are connected to the fourth node.
4 more elements
A high voltage generator comprising:
- a first predetermined number of boost-up or boost-down pumps configured to output, via a first output terminal, a positive or negative intermediate high voltage, by pumping an input voltage that is applied via an input terminal, the first predetermined number of boost-up or boost-down pumps being connected in series between the input terminal and the first output terminal;
- and
- a second predetermined number of boost-up or boost-down pumps configured to output, via a second output terminal, a positive or negative final high voltage, by pumping the positive or negative intermediate high voltage, the second predetermined number of boost-up or boost-down pumps being connected in series between the first output terminal and the second output terminal;
- and
- wherein each of the first predetermined number of boost-up or boost-down pumps and the second predetermined number of boost-up or boost-down pumps comprises:
- a pumping capacitor configured to pump a first voltage of a first node, in response to a first clock signal or a third clock signal;
- a gate pumping capacitor configured to pump a second voltage of a second node, in response to a second clock signal or a fourth clock signal;
- a charge transfer transistor comprising a first source connected to a first one of a third node and the first node, a first gate connected to the second node, a first drain connected to a remaining one of the first node and the third node, and a first body connected to a fourth node;
- a gate control transistor comprising a second source connected to the first one of the third node or the first node, a second gate connected to the remaining one of the first node or the third node, a second drain connected to the second node, and a second body connected to the fourth node;
- a gate discharge or charge unit configured to discharge or charge a charge of the second node, and comprising at least one gate discharge or charge transistor comprising a third gate and a third source that are connected to the second node, a third drain connected to the remaining one of the first node and the third node, and a third body connected to the fourth node;
- and
- a first body control transistor comprising a fourth source connected to the first one of the third node or the first node, a fourth gate connected to the remaining one of the first node or the third node, and a fourth drain and a fourth body that are connected to the fourth node.
9 more elements
A high voltage generator comprising:
- a predetermined number of boost-up and boost-down pumps configured to:
- output a positive high voltage via an output terminal, by boosting up an input voltage that is applied via an input terminal;
- and
- output a negative high voltage via the input terminal, by boosting down an output voltage that is applied via the output terminal,
- wherein the predetermined number of boost-up or boost-down pumps is connected in series between the input terminal and the output terminal,
- wherein each of the predetermined number of boost-up and boost-down pumps comprises:
- a first pumping capacitor configured to pump a first voltage of a first node, in response to a first clock signal;
- a second pumping capacitor configured to pump a third voltage of a third node, in response to a third clock signal;
- a gate pumping capacitor configured to pump a second voltage of a second node, in response to a second clock signal or a fourth clock signal;
- a charge transfer transistor comprising a first source connected to the third node, a first gate connected to the second node, and a first drain connected to the first node;
- a gate control transistor comprising a second source connected to the third node, a second gate connected to the first node, and a second drain connected to the second node;
- and
- a gate discharge or charge unit configured to discharge or charge a charge of the second node;
- a clock generator configured to generate the first dock signal, the second clock signal, the third clock signal, and the fourth clock signal, in response to a first enable signal during a boost-up operation;
- a first regulator configured to generate a first divided voltage by dividing the positive high voltage of the output terminal, in response to a first regulator enable signal during the boost-up operation;
- a first comparator configured to generate the first enable signal by comparing the first divided voltage with a first reference voltage;
- and
- a high voltage discharge unit configured to discharge the positive high voltage during a discharge operation after the boost-up operation.
15 more elements
Dependencies are inferred from the claim text.