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US 10,707,349 B2Granted
FinFETs with source/drain cladding
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuo-Cheng Chiang, Ka-Hing Fung, Zhiqiang Wu
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Abstract
A device includes a semiconductor substrate, and isolation regions extending into the semiconductor substrate. A semiconductor fin is between opposite portions of the isolation regions, wherein the semiconductor fin is over top surfaces of the isolation regions. A gate stack overlaps the semiconductor fin. A source/drain region is on a side of the gate stack and connected to the semiconductor fin. The source/drain region includes an inner portion thinner than the semiconductor fin, and an outer portion outside the inner portion. The semiconductor fin and the inner portion of the source/drain region have a same composition of group IV semiconductors.
Claims20
A device comprising:
- a first fin protruding above isolation regions, the first fin having a first channel region, a first source region, and a first drain region, the first channel region being interposed between the first source region and the first drain region, wherein a width of the first channel region is greater than a width of the first source region and the first drain region;
- oxidized regions along opposing sides of the first fin, a width of the first fin between the oxidized regions being less than a width of the first fin above the oxidized regions and less than a width of the first fin below the oxidized regions, wherein the isolation regions extend above the oxidized regions;
- a second fin protruding above isolation regions, the second fin having a second channel region, a second source region, and a second drain region, the second channel region being interposed between the second source region and the second drain region, wherein a width of the second channel region is greater than a width of the second source region and the second drain region;
- a first gate stack extending over the first channel region of the first fin;
- a second gate stack extending over the second channel region of the second fin;
- first epitaxial region along sidewalls and an upper surface of an upper portion of the first source region and the first drain region of the first fin;
- and
- second epitaxial region along sidewalls and an upper surface of an upper portion of the second source region and the second drain region of the second fin.
5 more elements
A device comprising:
- a first fin protruding above isolation regions, the first fin having a first channel region interposed between a first region and a second region, the first fin comprising a first semiconductor layer of a first semiconductor material and a second semiconductor layer of a second semiconductor material over the first semiconductor layer;
- oxidized regions along opposing sides of the first semiconductor layer below the first channel region, a width of the first fin between the oxidized regions being less than a width of the first fin above the oxidized regions and less than a width of the first fin below the oxidized regions, wherein the isolation regions extend above the oxidized regions;
- a second fin protruding above isolation regions, the second fin having a second channel region interposed between a third region and a fourth region, the second fin comprising a third semiconductor layer of the first semiconductor material, a fourth semiconductor layer of the second semiconductor material over the third semiconductor layer, and a fifth semiconductor layer over the fourth semiconductor layer, wherein a thickness of the first semiconductor layer is greater than a thickness of the third semiconductor layer;
- a first gate stack extending over the first channel region of the first fin;
- a second gate stack extending over the second channel region of the second fin;
- a first epitaxial region along sidewalls and an upper surface of an upper portion of the first fin adjacent the first gate stack;
- and
- a second epitaxial region along sidewalls and an upper surface of an upper portion of the second fin adjacent the second gate stack.
5 more elements
A device comprising:
- a first fin protruding above isolation regions, the first fin having a first channel region, a first end region, and a second end region, the first channel region being interposed between the first end region and the second end region;
- a second fin protruding above isolation regions, the second fin having a second channel region, a third end region, and a fourth end region, the second channel region being interposed between the third end region and the fourth end region, wherein the first fin and the second fin comprise a first semiconductor layer of a first semiconductor material and a second semiconductor layer of a second semiconductor material on the first semiconductor layer, wherein the second fin further comprises a third semiconductor layer on the second semiconductor layer;
- a first gate stack extending over the first channel region of the first fin;
- a second gate stack extending over the second channel region of the second fin;
- first epitaxial region along sidewalls and an upper surface of the second semiconductor layer of the first fin adjacent the first gate stack;
- and
- second epitaxial region along sidewalls and an upper surface of the third semiconductor layer of the second fin adjacent the second gate stack.
4 more elements
Dependencies are inferred from the claim text.