Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYao-Sheng Huang, Hung-Chang Sun, I-Ming Chang, Zi-Wei Fang
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Abstract
A method includes following steps. A dummy gate structure is formed across a first portion of a semiconductor fin. A doped semiconductor layer is formed across a second portion of the semiconductor fin. A dielectric layer is formed across the doped semiconductor layer. An interface between the dielectric layer and the doped semiconductor layer substantially conforms to a profile of a combination of a top surface and sidewalls of the semiconductor fin. The dummy gate structure is replaced with a metal gate structure.
Claims20
A method, comprising:
- forming a dummy gate structure across a first portion of a semiconductor fin;
- forming a fin spacer on a sidewall of the semiconductor fin;
- after forming the fin spacer, forming a doped semiconductor layer across a second portion of the semiconductor fin, such that a bottom end of the doped semiconductor layer is in contact with a top end of the fin spacer;
- forming a dielectric layer across the doped semiconductor layer, wherein an interface between the dielectric layer and the doped semiconductor layer substantially conforms to a profile of a combination of a top surface and sidewalls of the semiconductor fin;
- and
- replacing the dummy gate structure with a metal gate structure.
A method, comprising:
- forming a semiconductor fin over a substrate;
- forming a dummy gate structure across the semiconductor fin;
- forming a silicon-containing layer over the substrate, wherein the silicon-containing layer comprises a crystalline portion across the semiconductor fin and an amorphous portion across the dummy gate structure;
- removing the amorphous portion from the dummy gate structure;
- and
- replacing the dummy gate structure with a metal gate structure.
A semiconductor device, comprising:
- a substrate;
- a semiconductor fin over the substrate;
- a gate structure across a first portion of the semiconductor fin;
- a doped silicon-containing layer across a second portion of the semiconductor fin, wherein an outer profile of the doped silicon-containing layer is substantially the same as an inner profile of the doped silicon-containing layer;
- and
- a fin spacer alongside the semiconductor fin and under the doped silicon-containing layer, wherein a bottommost position of the fin spacer is lower than a bottommost position of the doped silicon-containing layer.
Dependencies are inferred from the claim text.