Group IIIA-N HEMT with a tunnel diode in the gate stack
AssigneeTexas Instruments Incorporated
InventorsChang Soo Suh, Dong Seup Lee, Jungwoo Joh, Naveen Tipirneni, Sameer Prakash Pendharkar
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Abstract
One example provides an enhancement-mode High Electron Mobility Transistor (HEMT) includes a substrate, a Group IIIA-N active layer over the substrate, a Group IIIA-N barrier layer over the active layer, and at least one isolation region through the barrier layer to provide an isolated active area having the barrier layer on the active layer. A gate stack is located between source and drain contacts to the active layer. A tunnel diode in the gate stack includes an n-GaN layer on an InGaN layer on a p-GaN layer located on the barrier layer.
Claims21
An electronic device, comprising:
- a substrate;
- a Group IIIA-N active layer on said substrate;
- a Group IIIA-N barrier layer on said active layer;
- at least one isolation region through said barrier layer to provide at least one isolated active area comprising said barrier layer on said active layer;
- a p-GaN layer on said barrier layer;
- a tunnel diode comprising a n-GaN layer on an InGaN layer on said p-GaN layer;
- a gate over said n-GaN layer;
- a drain having a drain contact on said barrier layer to provide contact to said active layer, and
- a source having a source contact on said barrier layer to provide contact to said active layer.
An integrated circuit, comprising:
- a gate stack located over a first group IIIA-N layer, the first group IIIA-N layer being located on a second group IIIA-N layer, and the gate stack having a topmost n-type group IIIA-N layer;
- and
- a gate electrode directly on the topmost n-type group IIIA-N layer.
A transistor, comprising:
- source and drain electrodes located over a group IIIA-N barrier layer;
- and
- a gate stack comprising a tunnel diode located on said barrier layer between the source electrode and the drain electrode.
Dependencies are inferred from the claim text.