Power device with multiple field stop layers

A power device comprising:

• a first Field Stop (FS) layer of a first conductivity type formed from a first-conductive-type semiconductor substrate, the first FS layer including a first region having an impurity density that is constant along a depth direction, the first FS layer including a second region having an impurity density profile along a depth direction lower than the impurity density profile of the first region;
• a second FS layer disposed on the first FS layer, the second FS layer having the first conductivity type, and including:
• a first implanted FS layer having a higher impurity density than the first FS layer;
• and
• a second implanted FS layer having an impurity density lower than the first implanted FS layer, the first implanted FS layer being disposed between the first FS layer and the second implanted FS layer;
• a drift region disposed on the second FS layer, the impurity density of the second implanted FS layer monotonically increasing from an interface of the second FS layer with the drift region to an interface between the first implanted FS layer and the second implanted FS layer;
• an epitaxial layer disposed on the second FS layer;
• and
• a gate electrode disposed on a gate insulation layer, the gate insulation layer being disposed on the epitaxial layer.

A power device comprising:

• a first Field Stop (FS) layer of a first conductivity type formed from a semiconductor substrate of the first conductivity type, the first FS layer including a first region having a constant impurity density profile along a depth direction and a second region having an impurity density profile along the depth direction lower than the impurity density profile of the first region;
• a second FS layer of the first conductivity type disposed on the first FS layer, the second FS layer including:
• a first implanted FS layer having an impurity density that is greater than an impurity density of the first FS layer;
• and
• a second implanted FS layer having an impurity density lower than the impurity density of the first implanted FS layer, the first implanted FS layer being disposed between the second implanted FS layer and the first FS layer, the first implanted FS layer having a minimum impurity density greater than or equal to a maximum impurity density of the second implanted FS layer, the maximum impurity density of the second implanted FS layer being at an interface between the first implanted FS layer and the second implanted FS layer;
• a drift region disposed on the second FS layer, the drift region being included in an epitaxial layer of the first conductivity type and having a lower impurity density than the impurity density of the first FS layer;
• a base region of a second conductivity type disposed in the drift region;
• an emitter region of the first conductivity type disposed in a surface portion of the base region;
• a gate electrode disposed on a gate insulation layer;
• and
• a collector region of the second conductivity type disposed below the first FS layer.