Semiconductor device and method of manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJui-Fen Chien, Hsiao-Kuan Wei, Hsien-Ming Lee, Chin-You Hsu
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Abstract
Provided is a semiconductor device including a fin-type field effect transistor (FinFET). The first FinFET includes a first gate structure and the first gate structure includes a first work function layer. The first work function layer includes a first layer and a second layer. The first layer is disposed over the second layer. The second layer includes a base material and a dopant doped in the base material. The dopant comprises Al, Ta, W, or a combination thereof. The first layer and the second layer comprise different materials. A method of manufacturing the semiconductor device is also provided.
Claims20
A semiconductor device, comprising:
- a first fin-type field effect transistor (FinFET) comprising a first gate structure, the first gate structure comprising a first work function layer;
- a second FinFET comprising a second gate structure, the second gate structure comprising a second work function layer;
- and
- a third FinFET comprising a third gate structure, the third gate structure comprising a third work function layer, wherein the first, second, and third work function layers have different thicknesses,
- at least one of the first work function layer, the second work function layer, and the third work function layer comprises a material layer having a base material and a dopant doped in the base material, wherein the dopant comprises Al, Ta, W, or a combination thereof.
A method of manufacturing a gate structure for a semiconductor device, comprising:
- providing a substrate having a first region, a second region, and a third region;
- forming a first gate structure having a first work function layer over the first region for a first fin-type field effect transistor (FinFET);
- forming a second gate structure having a second work function layer over the second region for a second FinFET;
- and
- forming a third gate structure having a third work function layer over the third region for a third FinFET, wherein the first, second, and third work function layers have different thicknesses,
- wherein one of the first, second, and third work function layers is doped with a dopant in a base material by an atomic layer deposition (ALD) method, and the dopant comprises Al, Ta, W or a combination thereof.
A semiconductor device, comprising:
- a first n-type FinFET with a threshold voltage Vn1 comprising a first gate structure, and the first gate structure comprising a first work function layer;
- a second n-type FinFET with a threshold voltage Vn2 comprising a second gate structure, and the second gate structure comprising a second work function layer;
- a third n-type FinFET with a threshold voltage Vn3 comprising a third gate structure, and the third gate structure comprising a third work function layer;
- a first p-type FinFET with a threshold voltage Vp1 comprising a fourth gate structure, and the fourth gate structure comprising a fourth work function layer;
- a second p-type FinFET with a threshold voltage Vp2 comprising a fifth gate structure and, and the fifth gate structure comprising a fifth work function layer;
- and
- a third p-type FinFET with a threshold voltage Vp3 comprising a sixth gate structure and, the sixth gate structure comprising a sixth work function layer, wherein:
- Vn1<Vn2<Vn3 and Vp1<Vp2<Vp3,
- at least one of the second work function layer, the third work function layer, the fourth work function layer, the fifth work function layer, and the sixth work function layer comprises a base material and a dopant doped in the base material, wherein the dopant comprises Al, Ta, W, or a combination thereof.
Dependencies are inferred from the claim text.