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US 10,707,271 B2Granted
Memory cells having resistors and formation of the same
AssigneeMicron Technology, Inc.
InventorsFabio Pellizzer, Andrea Redaelli, Agostino Pirovano, Innocenzo Tortorelli
Life of this patent
Estimating the term…
Abstract
The present disclosure includes memory cells having resistors, and methods of forming the same. An example method includes forming a first conductive line, forming a second conductive line, and forming a memory element between the first conductive line and the second conductive line. Forming the memory element can include forming one or more memory materials, and forming a resistor in series with the one or more memory materials. The resistor can be configured to reduce a capacitive discharge through the memory element during a state transition of the memory element.
Claims19
An array of memory cells, comprising:
- a plurality of first conductive lines formed in a first direction;
- a plurality of second conductive lines formed in a second direction;
- and
- a plurality of memory cells located between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising:
- a memory element comprising one or more memory materials;
- and
- a resistor, wherein the resistor is formed of a resistor material continuous across multiple memory cells of the plurality of memory cells such that the resistor is in contact with memory elements of multiple memory cells;
- wherein the resistor comprises a first resistor, and wherein each one of the plurality of memory cells further comprises a second resistor, and wherein:
- the first resistor is formed between the memory element and a respective one of the first conductive lines;
- and
- the second resistor is formed between the memory element and a respective one of the second conductive lines.
8 more elements
A method of forming a memory cell, comprising:
- forming a plurality of first conductive lines in a first direction;
- forming a plurality of second conductive lines in a second direction;
- forming a plurality of memory cells between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising:
- a memory element comprising one or more memory materials;
- and
- a resistor, wherein the resistor is formed of a resistor material continuous across multiple memory cells of the plurality of memory cells such that the resistor is in contact with memory elements of multiple memory cells;
- wherein:
- forming the plurality of first conductive lines in the first direction comprises forming a first conductive material;
- and
- forming the plurality of memory cells between the plurality of first conductive lines and the plurality of second conductive lines comprises forming a resistor material on the first conductive material;
- wherein the method includes:
- performing a first etch through a stack comprising the first conductive material and the resistor material such that a respective plurality of resistor material lines are defined along with the plurality of first conductive lines through the first etch.
9 more elements
An array of memory cells, comprising:
- a plurality of first conductive lines formed in a first direction;
- a plurality of second conductive lines formed in a second direction;
- and
- a plurality of memory cells located between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising:
- a memory element comprising one or more memory materials;
- and
- a resistor, wherein:
- the resistor is formed in at least one of the first and the second directions and in contact with memory elements of multiple memory cells;
- and
- the resistor is configured to reduce a capacitive discharge through the memory element during a state transition of the memory element;
- wherein:
- the resistor is a vertical resistor that is in contact with a respective one of the first conductive lines via a first surface and with the memory element via a second surface;
- and
- a surface area of the first surface is greater than a surface area of the second surface.
11 more elements
An array of memory cells, comprising:
- a plurality of first conductive lines formed in a first direction;
- a plurality of second conductive lines formed in a second direction;
- and
- a plurality of memory cells located between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising:
- a memory element comprising one or more memory materials;
- and
- a resistor, wherein the resistor is formed of a resistor material continuous across multiple memory cells of the plurality of memory cells such that the resistor is in contact with memory elements of multiple memory cells;
- wherein the one or more memory materials comprises a single memory material serving as both a storage element and a switch element.
5 more elements
An array of memory cells, comprising:
- a plurality of first conductive lines formed in a first direction;
- a plurality of second conductive lines formed in a second direction;
- and
- a plurality of memory cells located between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising:
- a memory element comprising one or more memory materials;
- and
- a resistor, wherein the resistor is formed of a resistor material continuous across multiple memory cells of the plurality of memory cells such that the resistor is in contact with memory elements of multiple memory cells;
- wherein the one or more memory materials comprises a first memory material serving as a storage element of the memory element and a second memory material serving as a switch element of the memory element.
5 more elements
A method of forming a memory cell, comprising:
- forming a plurality of first conductive lines in a first direction;
- forming a plurality of second conductive lines in a second direction;
- forming a plurality of memory cells between the plurality of first conductive lines and the plurality of second conductive lines, each one of the plurality of memory cells comprising:
- a memory element comprising one or more memory materials;
- and
- a resistor, wherein the resistor is formed of a resistor material continuous across multiple memory cells of the plurality of memory cells such that the resistor is in contact with memory elements of multiple memory cells;
- wherein forming the plurality of memory cells between the plurality of first conductive lines in the first direction comprises forming a plurality of vertical resistors between the plurality of first conductive lines and the one or more memory element materials, wherein the method includes:
- forming a first dielectric material on the first conductive line material;
- forming a plurality of trenches in the first dielectric material extending in the second direction;
- forming the resistor material in the plurality of trenches such that a portion of the resistor material is formed in the plurality of trenches;
- and
- performing an etch through the portion of the resistor material formed in the plurality of trenches to form a respective plurality of resistor material lines extending in the second direction.
9 more elements
Dependencies are inferred from the claim text.