Semiconductor device and method of fabricating the same

A semiconductor device comprising:

• a substrate;
• a first well region of a first conductivity type and a second well region of a second conductivity type formed horizontally adjacent to each other in the substrate;
• a buried insulation layer continuously formed on the first well region and the second well region;
• a first semiconductor layer formed to vertically overlap the first well region and a second semiconductor layer formed to vertically overlap the second well region on the buried insulation layer, the first semiconductor layer and the second semiconductor layer being sequentially disposed adjacent to each other in a first direction;
• a gate structure extending in the first direction on the first semiconductor layer and the second semiconductor layer;
• a first isolation layer including at least a portion formed on a first side of the gate structure when viewed from a top down view, the first isolation layer separating the first semiconductor layer and the second semiconductor layer from each other;
• and
• a conductive layer comprising a first side and a second side opposite to the first side, which extends over the first semiconductor layer and the second semiconductor layer and is formed on a second, opposite side of the gate structure,
• wherein the first isolation layer is disposed on the first side of the conductive layer and not disposed on the second side of the conductive layer.

A method of fabricating a semiconductor device, the method comprising:

• forming a first well region of a first conductivity type and a second well region of a second conductivity type horizontally adjacent to each other in a substrate;
• forming a buried insulation layer continuously on the first well region and the second well region;
• forming a first semiconductor layer and a second semiconductor layer on the buried insulation layer, the first semiconductor layer vertically overlapping the first well region, and the second semiconductor layer vertically overlapping the second well region;
• forming a trench between the first semiconductor layer and the second semiconductor layer,
• filling the trench to form a first isolation layer which separates at least a part of the first semiconductor layer and the second semiconductor layer;
• and
• forming a conductive layer on the first semiconductor layer and the second semiconductor layer to extend over the first semiconductor layer and the second semiconductor layer,
• wherein an upper surface of the buried insulation layer and a bottom surface of the first isolation layer are substantially coplanar, and
• wherein on a portion of the first semiconductor layer and second semiconductor layer where the first isolation layer is not formed, the conductive layer entirely covers an upper surface of the portion of the first semiconductor layer and an upper surface of the second semiconductor layer from a first end of the first semiconductor layer to a first end of the second semiconductor layer opposite the first end of the first semiconductor layer.